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OneOfEleven
2023-09-09 08:03:56 +01:00
parent 92305117f1
commit 54441e27d9
3388 changed files with 582553 additions and 0 deletions
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43
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/LPC-Link2/DebugConfig/LPC-Link2_LPC4370_Cortex-M4.dbgconf vendored Normal file
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// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug Setup
// <o> Release M0 On Connect
// <0=> No
// <1=> Yes
// <i> Debugger releases the M0 Application processor from reset when connecting to it.
ReleaseM0OnConnect = 1;
// <o> Release M0 Sub-System On Connect
// <0=> No
// <1=> Yes
// <i> Debugger releases the M0 Sub-System from reset when connecting to it (LPC437x only).
ReleaseM0SubOnConnect = 1;
// <o> Vector Reset
// <0=> Processor Only
// <1=> Processor and Peripherals
// <i> Select if to additionally reset peripherals (LCD, USB0, USB1, DMA, SDIO, ETHERNET) after a Vector Reset
VecResetWithPeriph = 1;
// </h>
// <h> TPIU Pin Routing (TRACECLK fixed on PF_4)
// <i> Configure the TPIU pin routing as used on your target platform.
// <o.1> TRACEDATA0
// <0=> Pin PF_5
// <1=> Pin P7_4
// <o.2> TRACEDATA1
// <0=> Pin PF_6
// <1=> Pin P7_5
// <o.3> TRACEDATA2
// <0=> Pin PF_7
// <1=> Pin P7_6
// <o.4> TRACEDATA3
// <0=> Pin PF_8
// <1=> Pin P7_7
RoutingTPIU = 0x00000000;
// </h>
// <<< end of configuration section >>>

43
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/LPC-Link2/DebugConfig/LPC-Link2_on-board_LPC4322_Cortex-M4.dbgconf vendored Normal file
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@@ -0,0 +1,43 @@
// <<< Use Configuration Wizard in Context Menu >>>
// <h> Debug Setup
// <o> Release M0 On Connect
// <0=> No
// <1=> Yes
// <i> Debugger releases the M0 Application processor from reset when connecting to it.
ReleaseM0OnConnect = 1;
// <o> Release M0 Sub-System On Connect
// <0=> No
// <1=> Yes
// <i> Debugger releases the M0 Sub-System from reset when connecting to it (LPC437x only).
ReleaseM0SubOnConnect = 1;
// <o> Vector Reset
// <0=> Processor Only
// <1=> Processor and Peripherals
// <i> Select if to additionally reset peripherals (LCD, USB0, USB1, DMA, SDIO, ETHERNET) after a Vector Reset
VecResetWithPeriph = 1;
// </h>
// <h> TPIU Pin Routing (TRACECLK fixed on PF_4)
// <i> Configure the TPIU pin routing as used on your target platform.
// <o.1> TRACEDATA0
// <0=> Pin PF_5
// <1=> Pin P7_4
// <o.2> TRACEDATA1
// <0=> Pin PF_6
// <1=> Pin P7_5
// <o.3> TRACEDATA2
// <0=> Pin PF_7
// <1=> Pin P7_6
// <o.4> TRACEDATA3
// <0=> Pin PF_8
// <1=> Pin P7_7
RoutingTPIU = 0x00000000;
// </h>
// <<< end of configuration section >>>