Initial commit
This commit is contained in:
150
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/clock_config.c
vendored
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150
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/clock_config.c
vendored
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@@ -0,0 +1,150 @@
|
||||
/***********************************************************************************************************************
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||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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**********************************************************************************************************************/
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/*
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* How to set up clock using clock driver functions:
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*
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* 1. Setup clock sources.
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*
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* 2. Set up wait states of the flash.
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*
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* 3. Set up all dividers.
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*
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* 4. Set up all selectors to provide selected clocks.
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*/
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/* clang-format off */
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/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!GlobalInfo
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product: Clocks v7.0
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processor: LPC55S69
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package_id: LPC55S69JBD64
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mcu_data: ksdk2_0
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processor_version: 9.0.3
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
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/* clang-format on */
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#include "fsl_power.h"
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#include "fsl_clock.h"
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#include "clock_config.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* System clock frequency. */
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extern uint32_t SystemCoreClock;
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/*******************************************************************************
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************************ BOARD_InitBootClocks function ************************
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******************************************************************************/
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void BOARD_InitBootClocks(void)
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{
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BOARD_BootClockRUN();
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}
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/*******************************************************************************
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********************** Configuration BOARD_BootClockRUN ***********************
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******************************************************************************/
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/* clang-format off */
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/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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!!Configuration
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name: BOARD_BootClockRUN
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called_from_default_init: true
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outputs:
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- {id: FXCOM0_clock.outFreq, value: 48 MHz}
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- {id: FXCOM3_clock.outFreq, value: 48 MHz}
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- {id: System_clock.outFreq, value: 150 MHz, locked: true, accuracy: '0.001'}
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- {id: USB1_PHY_clock.outFreq, value: 16 MHz}
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settings:
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- {id: PLL0_Mode, value: Normal}
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- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
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- {id: ENABLE_CLKIN_ENA, value: Enabled}
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- {id: ENABLE_PLL_USB_OUT, value: Enabled}
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- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
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- {id: SYSCON.FCCLKSEL0.sel, value: SYSCON.FROHFDIV}
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- {id: SYSCON.FCCLKSEL3.sel, value: SYSCON.FROHFDIV}
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- {id: SYSCON.FRGCTRL3_DIV.scale, value: '256', locked: true}
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- {id: SYSCON.FROHFDIV.scale, value: '2', locked: true}
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- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
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- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
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- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
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- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
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- {id: SYSCON.PLL0_PDEC.scale, value: '2'}
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sources:
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- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
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- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
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/* clang-format on */
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/*******************************************************************************
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* Variables for BOARD_BootClockRUN configuration
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******************************************************************************/
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/*******************************************************************************
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* Code for BOARD_BootClockRUN configuration
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******************************************************************************/
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void BOARD_BootClockRUN(void)
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{
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#ifndef SDK_SECONDARY_CORE
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/*!< Set up the clock sources */
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/*!< Configure FRO192M */
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POWER_DisablePD(kPDRUNCFG_PD_FRO192M); /*!< Ensure FRO is on */
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CLOCK_SetupFROClocking(12000000U); /*!< Set up FRO to the 12 MHz, just for sure */
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CLOCK_AttachClk(kFRO12M_to_MAIN_CLK); /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
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CLOCK_SetupFROClocking(96000000U); /* Enable FRO HF(96MHz) output */
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/*!< Configure XTAL32M */
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POWER_DisablePD(kPDRUNCFG_PD_XTAL32M); /* Ensure XTAL32M is powered */
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POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M); /* Ensure XTAL32M is powered */
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CLOCK_SetupExtClocking(16000000U); /* Enable clk_in clock */
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SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK; /* Enable clk_in from XTAL32M clock */
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ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK; /* Enable clk_in to system */
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ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_PLL_USB_OUT_MASK; /* Enable clk_in to HS USB */
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POWER_SetVoltageForFreq(150000000U); /*!< Set voltage for the one of the fastest clock outputs: System clock output */
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CLOCK_SetFLASHAccessCyclesForFreq(150000000U); /*!< Set FLASH wait states for core */
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/*!< Set up PLL */
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CLOCK_AttachClk(kEXT_CLK_to_PLL0); /*!< Switch PLL0CLKSEL to EXT_CLK */
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POWER_DisablePD(kPDRUNCFG_PD_PLL0); /* Ensure PLL is on */
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POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
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const pll_setup_t pll0Setup = {
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.pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
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.pllndec = SYSCON_PLL0NDEC_NDIV(8U),
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.pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
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.pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
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.pllRate = 150000000U,
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.flags = PLL_SETUPFLAG_WAITLOCK
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};
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CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */
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/*!< Set up dividers */
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#if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 3, 4)
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CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 0U, false); /*!< Set DIV to value 0xFF and MULT to value 0U in related FLEXFRGCTRL register */
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#else
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CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 256U, false); /*!< Set DIV to value 0xFF and MULT to value 0U in related FLEXFRGCTRL register */
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#endif
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#if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 3, 4)
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CLOCK_SetClkDiv(kCLOCK_DivFlexFrg3, 0U, false); /*!< Set DIV to value 0xFF and MULT to value 0U in related FLEXFRGCTRL register */
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#else
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CLOCK_SetClkDiv(kCLOCK_DivFlexFrg3, 256U, false); /*!< Set DIV to value 0xFF and MULT to value 0U in related FLEXFRGCTRL register */
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#endif
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CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Set AHBCLKDIV divider to value 1 */
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CLOCK_SetClkDiv(kCLOCK_DivFrohfClk, 0U, true); /*!< Reset FROHFDIV divider counter and halt it */
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CLOCK_SetClkDiv(kCLOCK_DivFrohfClk, 2U, false); /*!< Set FROHFDIV divider to value 2 */
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/*!< Set up clock selectors - Attach clocks to the peripheries */
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CLOCK_AttachClk(kPLL0_to_MAIN_CLK); /*!< Switch MAIN_CLK to PLL0 */
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CLOCK_AttachClk(kFRO_HF_DIV_to_FLEXCOMM0); /*!< Switch FLEXCOMM0 to FRO_HF_DIV */
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CLOCK_AttachClk(kFRO_HF_DIV_to_FLEXCOMM3); /*!< Switch FLEXCOMM3 to FRO_HF_DIV */
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/*!< Set SystemCoreClock variable. */
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SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
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#endif
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}
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62
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/clock_config.h
vendored
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62
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/clock_config.h
vendored
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@@ -0,0 +1,62 @@
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||||
/***********************************************************************************************************************
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||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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||||
**********************************************************************************************************************/
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#ifndef _CLOCK_CONFIG_H_
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#define _CLOCK_CONFIG_H_
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#include "fsl_common.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define BOARD_XTAL0_CLK_HZ 16000000U /*!< Board xtal frequency in Hz */
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#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32K frequency in Hz */
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/*******************************************************************************
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************************ BOARD_InitBootClocks function ************************
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus*/
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/*!
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* @brief This function executes default configuration of clocks.
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*
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*/
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void BOARD_InitBootClocks(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus*/
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/*******************************************************************************
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********************** Configuration BOARD_BootClockRUN ***********************
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******************************************************************************/
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/*******************************************************************************
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* Definitions for BOARD_BootClockRUN configuration
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******************************************************************************/
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#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 150000000U /*!< Core clock frequency: 150000000Hz */
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/*******************************************************************************
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* API for BOARD_BootClockRUN configuration
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******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus*/
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/*!
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* @brief This function executes configuration of clocks.
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*
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*/
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void BOARD_BootClockRUN(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus*/
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#endif /* _CLOCK_CONFIG_H_ */
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77
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/peripherals.c
vendored
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77
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/peripherals.c
vendored
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@@ -0,0 +1,77 @@
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||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
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||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
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||||
**********************************************************************************************************************/
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||||
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/* clang-format off */
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||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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||||
!!GlobalInfo
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product: Peripherals v9.0
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processor: LPC55S69
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package_id: LPC55S69JBD64
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mcu_data: ksdk2_0
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processor_version: 9.0.3
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functionalGroups:
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- name: BOARD_InitPeripherals
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UUID: 85f4cd0c-3b58-4e23-a413-239f6952f139
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called_from_default_init: true
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selectedCore: cm33_core0
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
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||||
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/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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||||
component:
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- type: 'system'
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- type_id: 'system_54b53072540eeeb8f8e9343e71f28176'
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- global_system_definitions:
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- user_definitions: ''
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- user_includes: ''
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* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/***********************************************************************************************************************
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||||
* Included files
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||||
**********************************************************************************************************************/
|
||||
#include "peripherals.h"
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||||
|
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/***********************************************************************************************************************
|
||||
* BOARD_InitPeripherals functional group
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**********************************************************************************************************************/
|
||||
/***********************************************************************************************************************
|
||||
* NVIC initialization code
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||||
**********************************************************************************************************************/
|
||||
/* clang-format off */
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||||
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
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||||
instance:
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||||
- name: 'NVIC'
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- type: 'nvic'
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||||
- mode: 'general'
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- custom_name_enabled: 'false'
|
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- type_id: 'nvic_57b5eef3774cc60acaede6f5b8bddc67'
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- functional_group: 'BOARD_InitPeripherals'
|
||||
- peripheral: 'NVIC'
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||||
- config_sets:
|
||||
- nvic:
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||||
- interrupt_table: []
|
||||
- interrupts: []
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||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
|
||||
/* clang-format on */
|
||||
|
||||
/* Empty initialization function (commented out)
|
||||
static void NVIC_init(void) {
|
||||
} */
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||||
|
||||
/***********************************************************************************************************************
|
||||
* Initialization functions
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitPeripherals(void)
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{
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/* Initialize components */
|
||||
}
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* BOARD_InitBootPeripherals function
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitBootPeripherals(void)
|
||||
{
|
||||
BOARD_InitPeripherals();
|
||||
}
|
33
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/peripherals.h
vendored
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33
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/peripherals.h
vendored
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@@ -0,0 +1,33 @@
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _PERIPHERALS_H_
|
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#define _PERIPHERALS_H_
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Included files
|
||||
**********************************************************************************************************************/
|
||||
#include "fsl_common.h"
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* Initialization functions
|
||||
**********************************************************************************************************************/
|
||||
|
||||
void BOARD_InitPeripherals(void);
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* BOARD_InitBootPeripherals function
|
||||
**********************************************************************************************************************/
|
||||
void BOARD_InitBootPeripherals(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* _PERIPHERALS_H_ */
|
337
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/pin_mux.c
vendored
Normal file
337
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/pin_mux.c
vendored
Normal file
@@ -0,0 +1,337 @@
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
/* clang-format off */
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
!!GlobalInfo
|
||||
product: Pins v9.0
|
||||
processor: LPC55S69
|
||||
package_id: LPC55S69JBD64
|
||||
mcu_data: ksdk2_0
|
||||
processor_version: 9.0.3
|
||||
pin_labels:
|
||||
- {pin_num: '36', pin_signal: PIO0_0/FC3_SCK/CTIMER0_MAT0/SCT_GPI0/SD1_CARD_INT_N/SECURE_GPIO0_0/ACMP0_A, label: _DBGIF_TCK_SWCLK, identifier: DBGIF_TCK_SWCLK}
|
||||
- {pin_num: '2', pin_signal: PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1, label: _DBGIF_TDI, identifier: DBGIF_TDI}
|
||||
- {pin_num: '52', pin_signal: PIO0_2/FC3_TXD_SCL_MISO_WS/CT_INP1/SCT0_OUT0/SCT_GPI2/SECURE_GPIO0_2, label: _DBGIF_TMS_SWDIO, identifier: DBGIF_TMS_SWDIO}
|
||||
- {pin_num: '44', pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28, label: _DBGIF_TMS_SWDIO_TXEN, identifier: DBGIF_TMS_SWDIO_TXEN}
|
||||
- {pin_num: '58', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19, label: _DBGIF_RESET, identifier: DBG_IF_RESET;DBGIF_RESET}
|
||||
- {pin_num: '46', pin_signal: PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13, label: _DBGIF_RESET_TXEN, identifier: DBG_IF_RESET_TXEN;DBGIF_RESET_TXEN}
|
||||
- {pin_num: '53', pin_signal: PIO0_3/FC3_RXD_SDA_MOSI_DATA/CTIMER0_MAT1/SCT0_OUT1/SCT_GPI3/SECURE_GPIO0_3, label: _DBGIF_TDO_SWO, identifier: DBG_IF_TDO_SWO;DBGIF_TDO_SWO}
|
||||
- {pin_num: '45', pin_signal: PIO0_24/FC0_RXD_SDA_MOSI_DATA/SD0_D0/CT_INP8/SCT_GPI0/SECURE_GPIO0_24, label: _FC0_TARGET_RXD, identifier: FC0_TARGET_RXD}
|
||||
- {pin_num: '51', pin_signal: PIO0_25/FC0_TXD_SCL_MISO_WS/SD0_D1/CT_INP9/SCT_GPI1/SECURE_GPIO0_25, label: _FC0_TARGET_TXD, identifier: FC0_TARGET_TXD}
|
||||
- {pin_num: '56', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, label: _LED1, identifier: LED1}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
/* clang-format on */
|
||||
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_gpio.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : BOARD_InitBootPins
|
||||
* Description : Calls initialization functions.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
void BOARD_InitBootPins(void)
|
||||
{
|
||||
MCU_LINK_InitPins();
|
||||
}
|
||||
|
||||
/* clang-format off */
|
||||
/*
|
||||
* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
|
||||
MCU_LINK_InitPins:
|
||||
- options: {callFromInitBoot: 'true', prefix: '', coreID: cm33_core0, enableClock: 'true'}
|
||||
- pin_list:
|
||||
- {pin_num: '36', peripheral: GPIO, signal: 'PIO0, 0', pin_signal: PIO0_0/FC3_SCK/CTIMER0_MAT0/SCT_GPI0/SD1_CARD_INT_N/SECURE_GPIO0_0/ACMP0_A, direction: INPUT,
|
||||
slew_rate: fast}
|
||||
- {pin_num: '2', peripheral: GPIO, signal: 'PIO0, 1', pin_signal: PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1, direction: INPUT, slew_rate: fast}
|
||||
- {pin_num: '52', peripheral: GPIO, signal: 'PIO0, 2', pin_signal: PIO0_2/FC3_TXD_SCL_MISO_WS/CT_INP1/SCT0_OUT0/SCT_GPI2/SECURE_GPIO0_2, direction: INPUT, mode: inactive,
|
||||
slew_rate: fast}
|
||||
- {pin_num: '44', peripheral: GPIO, signal: 'PIO0, 28', pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28, direction: OUTPUT,
|
||||
gpio_init_state: 'false', slew_rate: fast}
|
||||
- {pin_num: '58', peripheral: GPIO, signal: 'PIO0, 19', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
|
||||
identifier: DBGIF_RESET, direction: INPUT, slew_rate: fast}
|
||||
- {pin_num: '46', peripheral: GPIO, signal: 'PIO0, 13', pin_signal: PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13,
|
||||
identifier: DBGIF_RESET_TXEN, direction: OUTPUT, gpio_init_state: 'false'}
|
||||
- {pin_num: '53', peripheral: FLEXCOMM3, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_3/FC3_RXD_SDA_MOSI_DATA/CTIMER0_MAT1/SCT0_OUT1/SCT_GPI3/SECURE_GPIO0_3, identifier: DBGIF_TDO_SWO,
|
||||
slew_rate: fast}
|
||||
- {pin_num: '45', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_24/FC0_RXD_SDA_MOSI_DATA/SD0_D0/CT_INP8/SCT_GPI0/SECURE_GPIO0_24, slew_rate: fast}
|
||||
- {pin_num: '51', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_25/FC0_TXD_SCL_MISO_WS/SD0_D1/CT_INP9/SCT_GPI1/SECURE_GPIO0_25, slew_rate: fast}
|
||||
- {pin_num: '23', peripheral: USBHSH, signal: USB_DP, pin_signal: USB1_DP}
|
||||
- {pin_num: '24', peripheral: USBHSH, signal: USB_DM, pin_signal: USB1_DM}
|
||||
- {pin_num: '25', peripheral: USBHSH, signal: USB_VBUS, pin_signal: USB1_VBUS}
|
||||
- {pin_num: '22', peripheral: USBHSH, signal: USB_VSS, pin_signal: USB1_VSS22}
|
||||
- {pin_num: '26', peripheral: USBHSH, signal: USB_VSS, pin_signal: USB1_VSS26}
|
||||
- {pin_num: '41', peripheral: USBHSH, signal: USB_PORTPWRN, pin_signal: PIO1_2/CTIMER0_MAT3/SCT_GPI6/HS_SPI_SCK/USB1_PORTPWRN/PLU_OUT5}
|
||||
- {pin_num: '56', peripheral: GPIO, signal: 'PIO0, 5', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, direction: OUTPUT,
|
||||
gpio_init_state: 'true', mode: pullUp}
|
||||
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
|
||||
*/
|
||||
/* clang-format on */
|
||||
|
||||
/* FUNCTION ************************************************************************************************************
|
||||
*
|
||||
* Function Name : MCU_LINK_InitPins
|
||||
* Description : Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
* END ****************************************************************************************************************/
|
||||
/* Function assigned for the Cortex-M33 (Core #0) */
|
||||
void MCU_LINK_InitPins(void)
|
||||
{
|
||||
/* Enables the clock for the I/O controller.: Enable Clock. */
|
||||
CLOCK_EnableClock(kCLOCK_Iocon);
|
||||
|
||||
/* Enables the clock for the GPIO0 module */
|
||||
CLOCK_EnableClock(kCLOCK_Gpio0);
|
||||
|
||||
gpio_pin_config_t DBGIF_TCK_SWCLK_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_0 (pin 36) */
|
||||
GPIO_PinInit(DBGIF_TCK_SWCLK_GPIO, DBGIF_TCK_SWCLK_PORT, DBGIF_TCK_SWCLK_PIN, &DBGIF_TCK_SWCLK_config);
|
||||
|
||||
gpio_pin_config_t DBGIF_TDI_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_1 (pin 2) */
|
||||
GPIO_PinInit(DBGIF_TDI_GPIO, DBGIF_TDI_PORT, DBGIF_TDI_PIN, &DBGIF_TDI_config);
|
||||
|
||||
gpio_pin_config_t DBGIF_TMS_SWDIO_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_2 (pin 52) */
|
||||
GPIO_PinInit(DBGIF_TMS_SWDIO_GPIO, DBGIF_TMS_SWDIO_PORT, DBGIF_TMS_SWDIO_PIN, &DBGIF_TMS_SWDIO_config);
|
||||
|
||||
gpio_pin_config_t LED1_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 1U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_5 (pin 56) */
|
||||
GPIO_PinInit(LED1_GPIO, LED1_PORT, LED1_PIN, &LED1_config);
|
||||
|
||||
gpio_pin_config_t DBGIF_RESET_TXEN_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_13 (pin 46) */
|
||||
GPIO_PinInit(DBGIF_RESET_TXEN_GPIO, DBGIF_RESET_TXEN_PORT, DBGIF_RESET_TXEN_PIN, &DBGIF_RESET_TXEN_config);
|
||||
|
||||
gpio_pin_config_t DBGIF_RESET_config = {
|
||||
.pinDirection = kGPIO_DigitalInput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_19 (pin 58) */
|
||||
GPIO_PinInit(DBGIF_RESET_GPIO, DBGIF_RESET_PORT, DBGIF_RESET_PIN, &DBGIF_RESET_config);
|
||||
|
||||
gpio_pin_config_t DBGIF_TMS_SWDIO_TXEN_config = {
|
||||
.pinDirection = kGPIO_DigitalOutput,
|
||||
.outputLogic = 0U
|
||||
};
|
||||
/* Initialize GPIO functionality on pin PIO0_28 (pin 44) */
|
||||
GPIO_PinInit(DBGIF_TMS_SWDIO_TXEN_GPIO, DBGIF_TMS_SWDIO_TXEN_PORT, DBGIF_TMS_SWDIO_TXEN_PIN, &DBGIF_TMS_SWDIO_TXEN_config);
|
||||
|
||||
IOCON->PIO[0][0] = ((IOCON->PIO[0][0] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT00 (pin 36) is configured as PIO0_0. */
|
||||
| IOCON_PIO_FUNC(PIO0_0_FUNC_ALT0)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_0_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_0_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][1] = ((IOCON->PIO[0][1] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT01 (pin 2) is configured as PIO0_1. */
|
||||
| IOCON_PIO_FUNC(PIO0_1_FUNC_ALT0)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_1_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_1_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][13] = ((IOCON->PIO[0][13] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT013 (pin 46) is configured as PIO0_13. */
|
||||
| IOCON_PIO_FUNC(PIO0_13_FUNC_ALT0)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_13_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][19] = ((IOCON->PIO[0][19] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT019 (pin 58) is configured as PIO0_19. */
|
||||
| IOCON_PIO_FUNC(PIO0_19_FUNC_ALT0)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_19_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_19_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][2] = ((IOCON->PIO[0][2] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT02 (pin 52) is configured as PIO0_2. */
|
||||
| IOCON_PIO_FUNC(PIO0_2_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled). */
|
||||
| IOCON_PIO_MODE(PIO0_2_MODE_INACTIVE)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_2_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_2_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][24] = ((IOCON->PIO[0][24] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT024 (pin 45) is configured as FC0_RXD_SDA_MOSI_DATA. */
|
||||
| IOCON_PIO_FUNC(PIO0_24_FUNC_ALT1)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_24_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_24_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][25] = ((IOCON->PIO[0][25] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT025 (pin 51) is configured as FC0_TXD_SCL_MISO_WS. */
|
||||
| IOCON_PIO_FUNC(PIO0_25_FUNC_ALT1)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_25_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_25_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][28] = ((IOCON->PIO[0][28] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT028 (pin 44) is configured as PIO0_28. */
|
||||
| IOCON_PIO_FUNC(PIO0_28_FUNC_ALT0)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_28_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_28_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][3] = ((IOCON->PIO[0][3] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_SLEW_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT03 (pin 53) is configured as FC3_RXD_SDA_MOSI_DATA. */
|
||||
| IOCON_PIO_FUNC(PIO0_3_FUNC_ALT1)
|
||||
|
||||
/* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details. */
|
||||
| IOCON_PIO_SLEW(PIO0_3_SLEW_FAST)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_3_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[0][5] = ((IOCON->PIO[0][5] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT05 (pin 56) is configured as PIO0_5. */
|
||||
| IOCON_PIO_FUNC(PIO0_5_FUNC_ALT0)
|
||||
|
||||
/* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Pull-up.
|
||||
* Pull-up resistor enabled. */
|
||||
| IOCON_PIO_MODE(PIO0_5_MODE_PULL_UP)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO0_5_DIGIMODE_DIGITAL));
|
||||
|
||||
IOCON->PIO[1][2] = ((IOCON->PIO[1][2] &
|
||||
/* Mask bits to zero which are setting */
|
||||
(~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
|
||||
|
||||
/* Selects pin function.
|
||||
* : PORT12 (pin 41) is configured as USB1_PORTPWRN. */
|
||||
| IOCON_PIO_FUNC(PIO1_2_FUNC_ALT7)
|
||||
|
||||
/* Select Digital mode.
|
||||
* : Enable Digital mode.
|
||||
* Digital input is enabled. */
|
||||
| IOCON_PIO_DIGIMODE(PIO1_2_DIGIMODE_DIGITAL));
|
||||
}
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
276
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/pin_mux.h
vendored
Normal file
276
external/CMSIS_5/CMSIS/DAP/Firmware/Examples/MCU-LINK/board/pin_mux.h
vendored
Normal file
@@ -0,0 +1,276 @@
|
||||
/***********************************************************************************************************************
|
||||
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
|
||||
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#ifndef _PIN_MUX_H_
|
||||
#define _PIN_MUX_H_
|
||||
|
||||
/*!
|
||||
* @addtogroup pin_mux
|
||||
* @{
|
||||
*/
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* API
|
||||
**********************************************************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @brief Calls initialization functions.
|
||||
*
|
||||
*/
|
||||
void BOARD_InitBootPins(void);
|
||||
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_0_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO0_0_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_0_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_13_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO0_13_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_19_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO0_19_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_19_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_1_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO0_1_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_1_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_24_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 1. */
|
||||
#define PIO0_24_FUNC_ALT1 0x01u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_24_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_25_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 1. */
|
||||
#define PIO0_25_FUNC_ALT1 0x01u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_25_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_28_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO0_28_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_28_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_2_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO0_2_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Selects function mode (on-chip pull-up/pull-down resistor control).
|
||||
* : Inactive.
|
||||
* Inactive (no pull-down/pull-up resistor enabled).
|
||||
*/
|
||||
#define PIO0_2_MODE_INACTIVE 0x00u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_2_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_3_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 1. */
|
||||
#define PIO0_3_FUNC_ALT1 0x01u
|
||||
/*!
|
||||
* @brief
|
||||
* Driver slew rate.
|
||||
* : Fast-mode, output slew rate is faster.
|
||||
* Refer to the appropriate specific device data sheet for details.
|
||||
*/
|
||||
#define PIO0_3_SLEW_FAST 0x01u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO0_5_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 0. */
|
||||
#define PIO0_5_FUNC_ALT0 0x00u
|
||||
/*!
|
||||
* @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
|
||||
#define PIO0_5_MODE_PULL_UP 0x02u
|
||||
/*!
|
||||
* @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
|
||||
#define PIO1_2_DIGIMODE_DIGITAL 0x01u
|
||||
/*!
|
||||
* @brief Selects pin function.: Alternative connection 7. */
|
||||
#define PIO1_2_FUNC_ALT7 0x07u
|
||||
|
||||
/*! @name PIO0_0 (number 36), _DBGIF_TCK_SWCLK
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define DBGIF_TCK_SWCLK_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define DBGIF_TCK_SWCLK_GPIO_PIN_MASK (1U << 0U) /*!<@brief GPIO pin mask */
|
||||
#define DBGIF_TCK_SWCLK_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define DBGIF_TCK_SWCLK_PIN 0U /*!<@brief PORT pin number */
|
||||
#define DBGIF_TCK_SWCLK_PIN_MASK (1U << 0U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_1 (number 2), _DBGIF_TDI
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define DBGIF_TDI_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define DBGIF_TDI_GPIO_PIN_MASK (1U << 1U) /*!<@brief GPIO pin mask */
|
||||
#define DBGIF_TDI_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define DBGIF_TDI_PIN 1U /*!<@brief PORT pin number */
|
||||
#define DBGIF_TDI_PIN_MASK (1U << 1U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_2 (number 52), _DBGIF_TMS_SWDIO
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define DBGIF_TMS_SWDIO_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define DBGIF_TMS_SWDIO_GPIO_PIN_MASK (1U << 2U) /*!<@brief GPIO pin mask */
|
||||
#define DBGIF_TMS_SWDIO_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define DBGIF_TMS_SWDIO_PIN 2U /*!<@brief PORT pin number */
|
||||
#define DBGIF_TMS_SWDIO_PIN_MASK (1U << 2U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_28 (number 44), _DBGIF_TMS_SWDIO_TXEN
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define DBGIF_TMS_SWDIO_TXEN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define DBGIF_TMS_SWDIO_TXEN_GPIO_PIN_MASK (1U << 28U) /*!<@brief GPIO pin mask */
|
||||
#define DBGIF_TMS_SWDIO_TXEN_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define DBGIF_TMS_SWDIO_TXEN_PIN 28U /*!<@brief PORT pin number */
|
||||
#define DBGIF_TMS_SWDIO_TXEN_PIN_MASK (1U << 28U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_19 (number 58), _DBGIF_RESET
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define DBGIF_RESET_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define DBGIF_RESET_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
|
||||
#define DBGIF_RESET_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define DBGIF_RESET_PIN 19U /*!<@brief PORT pin number */
|
||||
#define DBGIF_RESET_PIN_MASK (1U << 19U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_13 (number 46), _DBGIF_RESET_TXEN
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define DBGIF_RESET_TXEN_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define DBGIF_RESET_TXEN_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */
|
||||
#define DBGIF_RESET_TXEN_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define DBGIF_RESET_TXEN_PIN 13U /*!<@brief PORT pin number */
|
||||
#define DBGIF_RESET_TXEN_PIN_MASK (1U << 13U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_3 (number 53), _DBGIF_TDO_SWO
|
||||
@{ */
|
||||
#define DBGIF_TDO_SWO_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define DBGIF_TDO_SWO_PIN 3U /*!<@brief PORT pin number */
|
||||
#define DBGIF_TDO_SWO_PIN_MASK (1U << 3U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_24 (number 45), _FC0_TARGET_RXD
|
||||
@{ */
|
||||
#define FC0_TARGET_RXD_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define FC0_TARGET_RXD_PIN 24U /*!<@brief PORT pin number */
|
||||
#define FC0_TARGET_RXD_PIN_MASK (1U << 24U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_25 (number 51), _FC0_TARGET_TXD
|
||||
@{ */
|
||||
#define FC0_TARGET_TXD_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define FC0_TARGET_TXD_PIN 25U /*!<@brief PORT pin number */
|
||||
#define FC0_TARGET_TXD_PIN_MASK (1U << 25U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*! @name PIO0_5 (number 56), _LED1
|
||||
@{ */
|
||||
|
||||
/* Symbols to be used with GPIO driver */
|
||||
#define LED1_GPIO GPIO /*!<@brief GPIO peripheral base pointer */
|
||||
#define LED1_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
|
||||
#define LED1_PORT 0U /*!<@brief PORT peripheral base pointer */
|
||||
#define LED1_PIN 5U /*!<@brief PORT pin number */
|
||||
#define LED1_PIN_MASK (1U << 5U) /*!<@brief PORT pin mask */
|
||||
/* @} */
|
||||
|
||||
/*!
|
||||
* @brief Configures pin routing and optionally pin electrical features.
|
||||
*
|
||||
*/
|
||||
void MCU_LINK_InitPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @}
|
||||
*/
|
||||
#endif /* _PIN_MUX_H_ */
|
||||
|
||||
/***********************************************************************************************************************
|
||||
* EOF
|
||||
**********************************************************************************************************************/
|
Reference in New Issue
Block a user