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This commit is contained in:
Bruno Rybársky
2025-03-31 21:53:23 +02:00
parent 101bde7463
commit f1904e03fe
16 changed files with 446 additions and 246 deletions
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63
driver/uart.c
View File

@@ -15,6 +15,7 @@
*/
#include <stdbool.h>
#include <string.h>
#include "bsp/dp32g030/dma.h"
#include "bsp/dp32g030/syscon.h"
#include "bsp/dp32g030/uart.h"
@@ -23,8 +24,7 @@
static bool UART_IsLogEnabled;
uint8_t UART_DMA_Buffer[256];
void UART_Init(void)
{
void UART_Init(void) {
uint32_t Delta;
uint32_t Positive;
uint32_t Frequency;
@@ -48,35 +48,32 @@ void UART_Init(void)
DMA_CTR = (DMA_CTR & ~DMA_CTR_DMAEN_MASK) | DMA_CTR_DMAEN_BITS_DISABLE;
DMA_CH0->MSADDR = (uint32_t)(uintptr_t)&UART1->RDR;
DMA_CH0->MDADDR = (uint32_t)(uintptr_t)UART_DMA_Buffer;
DMA_CH0->MSADDR = (uint32_t) (uintptr_t) &UART1->RDR;
DMA_CH0->MDADDR = (uint32_t) (uintptr_t) UART_DMA_Buffer;
DMA_CH0->MOD = 0
// Source
| DMA_CH_MOD_MS_ADDMOD_BITS_NONE
| DMA_CH_MOD_MS_SIZE_BITS_8BIT
| DMA_CH_MOD_MS_SEL_BITS_HSREQ_MS1
// Destination
| DMA_CH_MOD_MD_ADDMOD_BITS_INCREMENT
| DMA_CH_MOD_MD_SIZE_BITS_8BIT
| DMA_CH_MOD_MD_SEL_BITS_SRAM
;
// Source
| DMA_CH_MOD_MS_ADDMOD_BITS_NONE
| DMA_CH_MOD_MS_SIZE_BITS_8BIT
| DMA_CH_MOD_MS_SEL_BITS_HSREQ_MS1
// Destination
| DMA_CH_MOD_MD_ADDMOD_BITS_INCREMENT
| DMA_CH_MOD_MD_SIZE_BITS_8BIT
| DMA_CH_MOD_MD_SEL_BITS_SRAM;
DMA_INTEN = 0;
DMA_INTST = 0
| DMA_INTST_CH0_TC_INTST_BITS_SET
| DMA_INTST_CH1_TC_INTST_BITS_SET
| DMA_INTST_CH2_TC_INTST_BITS_SET
| DMA_INTST_CH3_TC_INTST_BITS_SET
| DMA_INTST_CH0_THC_INTST_BITS_SET
| DMA_INTST_CH1_THC_INTST_BITS_SET
| DMA_INTST_CH2_THC_INTST_BITS_SET
| DMA_INTST_CH3_THC_INTST_BITS_SET
;
| DMA_INTST_CH0_TC_INTST_BITS_SET
| DMA_INTST_CH1_TC_INTST_BITS_SET
| DMA_INTST_CH2_TC_INTST_BITS_SET
| DMA_INTST_CH3_TC_INTST_BITS_SET
| DMA_INTST_CH0_THC_INTST_BITS_SET
| DMA_INTST_CH1_THC_INTST_BITS_SET
| DMA_INTST_CH2_THC_INTST_BITS_SET
| DMA_INTST_CH3_THC_INTST_BITS_SET;
DMA_CH0->CTR = 0
| DMA_CH_CTR_CH_EN_BITS_ENABLE
| ((0xFF << DMA_CH_CTR_LENGTH_SHIFT) & DMA_CH_CTR_LENGTH_MASK)
| DMA_CH_CTR_LOOP_BITS_ENABLE
| DMA_CH_CTR_PRI_BITS_MEDIUM
;
| DMA_CH_CTR_CH_EN_BITS_ENABLE
| ((0xFF << DMA_CH_CTR_LENGTH_SHIFT) & DMA_CH_CTR_LENGTH_MASK)
| DMA_CH_CTR_LOOP_BITS_ENABLE
| DMA_CH_CTR_PRI_BITS_MEDIUM;
UART1->IF = UART_IF_RXTO_BITS_SET;
DMA_CTR = (DMA_CTR & ~DMA_CTR_DMAEN_MASK) | DMA_CTR_DMAEN_BITS_ENABLE;
@@ -84,9 +81,8 @@ void UART_Init(void)
UART1->CTRL |= UART_CTRL_UARTEN_BITS_ENABLE;
}
void UART_Send(const void *pBuffer, uint32_t Size)
{
const uint8_t *pData = (const uint8_t *)pBuffer;
void UART_Send(const void *pBuffer, uint32_t Size) {
const uint8_t *pData = (const uint8_t *) pBuffer;
uint32_t i;
for (i = 0; i < Size; i++) {
@@ -96,8 +92,11 @@ void UART_Send(const void *pBuffer, uint32_t Size)
}
}
void UART_LogSend(const void *pBuffer, uint32_t Size)
{
void UART_String(const char *str) {
UART_Send(str, strlen(str));
}
void UART_LogSend(const void *pBuffer, uint32_t Size) {
if (UART_IsLogEnabled) {
UART_Send(pBuffer, Size);
}

1
driver/uart.h
View File

@@ -25,6 +25,7 @@ extern uint8_t UART_DMA_Buffer[256];
void UART_Init(void);
void UART_Send(const void *pBuffer, uint32_t Size);
void UART_LogSend(const void *pBuffer, uint32_t Size);
void UART_String(const char *str);
#endif