/* ---------------------------------------------------------------------- * Copyright (C) 2016 Arm Limited. All rights reserved. * * $Date: 14. April 2016 * $Revision: 1.02 * * Project: CMSIS-RTOS API * Title: cmsis_os.txt * * Description: Documentation file for the CMSIS-RTOS API. * * Version 0.03 * Initial Proposal Phase * Version 1.01 * Rework as described in Hist.txt * Version 1.02 * Rework as described in Hist.txt * Version 1.03 * Documentation rework for CMSIS 5 * -------------------------------------------------------------------- */ /*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/ /** \mainpage This manual describes the \b CMSIS-RTOS \b API \b Version \b 1 and the reference implementation \ref rtxImplementation "CMSIS-RTOS RTX" which is designed for Cortex-M processor-based devices. The RTOS kernel can be used for creating applications that perform multiple tasks simultaneously. These tasks are executed by threads that operate in a quasi-parallel fashion. While it is certainly possible to create real-time applications without an RTOS (by executing one or more tasks in a loop), there are numerous scheduling, maintenance, and timing issues that can be solved better with an RTOS. For example, an RTOS enables flexible scheduling of system resources like CPU and memory, and offers methods to communicate between threads. CMSIS-RTOS API programs are written using standard C/C++ constructs and are compiled with the ARMCC, GCC, or IAR Compiler. The \ref cmsis_os_h "cmsis_os.h header file" defines functions and macros that allow declaring tasks and accessing all RTOS features easily. This manual contains the following sections: - \subpage rtos_revisionHistory : Documents changes made in each version for CMSIS-RTOS API and RTX. - \subpage genRTOSIF : Provides an overview about the CMSIS-RTOS API. - \subpage usingOS : Provides generic instructions for using a CMSIS-RTOS API compliant implementation. - \subpage functionOverview : Lists the CMSIS-RTOS API functions including RTX-specific extensions. - \subpage rtosValidation : Describes the Software Pack that can be used to validate a CMSIS-RTOS implementation. - \subpage rtxImplementation : Documents the open-source implementation CMSIS-RTOS RTX. \note An extended version of the CMSIS-RTOS API is available in CMSIS-RTOS v2.
Version | Description |
---|---|
V1.03 - only documentation changes | Incorporated documentation for reference implementation CMSIS-RTOS RTX. |
V1.02 - only documentation changes | Added: Overview of the \ref rtosValidation "CMSIS-RTOS Validation" Software Pack.\n Clarified: Behaviour of \ref CMSIS_RTOS_TimeOutValue. |
V1.02 | Added: New control functions for short timeouts in microsecond resolution \ref osKernelSysTick, \ref osKernelSysTickFrequency, \ref osKernelSysTickMicroSec.\n Removed: osSignalGet. |
V1.01 | Added capabilities for C++, kernel initialization and object deletion.\n Prepared for C++ class interface. In this context to \em const attribute has been moved from osXxxxDef_t typedefs to the osXxxxDef macros.\n Added: \ref osTimerDelete, \ref osMutexDelete, \ref osSemaphoreDelete.\n Added: \ref osKernelInitialize that prepares the Kernel for object creation.\n |
V1.00 | First official Release.\n Added: \ref osKernelStart; starting 'main' as a thread is now an optional feature.\n Semaphores have now the standard behavior.\n \ref osTimerCreate does no longer start the timer. Added: \ref osTimerStart (replaces osTimerRestart).\n Changed: osThreadPass is renamed to \ref osThreadYield. |
V0.02 | Preview Release. |
Version | Description |
---|---|
V4.82 | Corrected: Recursive Mutex 16-bit lock counter is now checked to not overflow.\n |
V4.81 | Added provisions for Arm Compiler 6.\n Corrected: Message Queue behavior when osMessagePut timed out due to full queue and osMessageGet was called from ISR.\n |
V4.80 | Restored time delay parameter 'millisec' old behavior (before V4.79) for software compatibility.\n Corrected: implicit mutex release when mutex owner thread is terminated.\n |
V4.79 | Corrected: time delay parameter ‘millisec’ in all functions (osDelay, osSignalWait, …) is now treated as lower bound – wait for at least time given (before it could have been up to 1ms less).\n Corrected: Lazy Context switching for Cortex-M4 with FPU could lead to a crash when thread which used FPU was terminated.\n Corrected: osMailCAlloc only cleared the allocated memory block if it was available without waiting.\n Corrected: osThreadCreate function returns NULL when trying to create more concurrent threads than defined in the configuration.\n Improved source code MISRA compliance.\n |
V4.78 | Corrected: osTimerStart function accepts full 32-bit range for time delay value in milisec.\n Added: User Timer Callback Queue overflow reported through os_error(OS_ERROR_TIMER_OVF).\n |
V4.77 | Added: Stack usage watermark.\n |
V4.76 | Optimized Service calls in GCC libraries.\n Corrected: Stack/Heap regions can be used with scatter loading.\n |
V4.75 | Corrected: Service calls for Cortex-M4 with Floating Point for GCC.\n Corrected: \ref osSignalClear returns 0x80000000 when called from interrupt service routines.\n Corrected: C standard library memory functions (malloc, free, ...) can be called between calls to \ref osKernelInitialize and \ref osKernelStart.\n Corrected: Interrupt Priority Group can be configured between calls to \ref osKernelInitialize and \ref osKernelStart.\n |
V4.74 | Corrected: \ref osKernelInitialize and \ref osKernelStart when called from main which is already a thread.\n |
V4.73 | Corrected: mutex priority inversion when thread owns more than one mutex.\n Added: RTX extensions os_suspend and os_resume.\n Added: RTX os_error template. |
V4.72 | Corrected: object initialization when defined inside function (allocated on stack and not as static memory). |
V4.71 | Corrected: osMailFree behaviour when osMailAlloc timed out. |
V4.70 | Added: New control functions for short timeouts in microsecond resolution \ref osKernelSysTick, \ref osKernelSysTickFrequency, \ref osKernelSysTickMicroSec.\n Removed: osSignalGet. |
V4.61 | Enhanced: \ref osTimerCreate can now be called after \ref osKernelInitialize (before only after \ref osKernelStart).\n Corrected: Initialization of alternative kernel timer for Cortex-M0/M0+/M1 (when SysTick timer is not used).\n Corrected: Message/Mail Queue behavior when timeout expires. |
V4.51 | Corrected: problem with \ref osKernelInitialize when after the call high priority threads are defined. |
V4.50 | Based on CMSIS-RTOS API Version 1.01 and the classic RTX V4.50 Kernel.\n Added: \ref osTimerDelete, \ref osMutexDelete, \ref osSemaphoreDelete.\n Added: \ref osKernelInitialize that prepares the Kernel for object creation.\n Added: support for Low Power Cortex-M applications based on new configuration functions: \b os_suspend, \b os_resume.\n Added: support for peripheral timer to be used as OS tick timer instead of Core SysTick timer.\n Corrected: stack checking did not work for os_tsk_delete_self function Preview Release. |
V4.20 | Initial CMSIS-RTOS adaption of the RTX Kernel. |
Directory | Content |
---|---|
INC | The include files for CMSIS-RTOS RTX. cmsis_os.h is the central include file for user applications. |
LIB | CMSIS-RTOS RTX library files for ARMCC, GCC, and IAR Compiler. |
SRC | Source code of CMSIS-RTOS RTX library along with project files for ARMCC, GCC, and IAR Compiler. |
Templates | CMSIS-RTOS RTX configuration file (\ref RTX_Conf_CM "RTX_Conf_CM.c"). |
UserCode Templates | Template files for creating application projects with CMSIS-RTOS RTX. |
Library File | Processor Configuration |
---|---|
LIB/ARM/RTX_CM0.lib | CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M0 and M1, little-endian. |
LIB/ARM/RTX_CM0_B.lib | CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M0 and M1, big-endian. |
LIB/ARM/RTX_CM3.lib | CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M3, M4, and M7 without FPU, little-endian. |
LIB/ARM/RTX_CM3_B.lib | CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M3, M4, and M7 without FPU, big-endian. |
LIB/ARM/RTX_CM4.lib | CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M4 and M7 with FPU, little-endian. |
LIB/ARM/RTX_CM4_B.lib | CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M4 and M7 with FPU, big-endian. |
LIB/GCC/libRTX_CM0.a | CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M0 and M1, little-endian. |
LIB/GCC/libRTX_CM0_B.a | CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M0 and M1, big-endian. |
LIB/GCC/libRTX_CM3.a | CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M3, M4, and M7 without FPU, little-endian. |
LIB/GCC/libRTX_CM3_B.a | CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M3, M4, and M7 without FPU, big-endian. |
LIB/GCC/libRTX_CM4.a | CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M4 and M7 with FPU, little-endian. |
LIB/GCC/libRTX_CM4_B.a | CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M4 and M7 with FPU, big-endian. |
LIB/IAR/RTX_CM0.lib | CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M0 and M1, little-endian. |
LIB/IAR/RTX_CM0_B.lib | CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M0 and M1, big-endian. |
LIB/IAR/RTX_CM3.lib | CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M3, M4, and M7 without FPU, little-endian. |
LIB/IAR/RTX_CM3_B.lib | CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M3, M4, and M7 without FPU, big-endian. |
LIB/IAR/RTX_CM4.lib | CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M4 and M7 with FPU, little-endian. |
LIB/IAR/RTX_CM4_B.lib | CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M4 and M7 with FPU, big-endian. |
Description | Limitations |
---|---|
Defined Tasks | Unlimited |
Active Threads | 250 max |
Mailboxes | Unlimited |
Semaphores | Unlimited |
Mutexes | Unlimited |
Signals | 16 per thread |
Timer Callbacks | Unlimited |
Code Space | < 5.0 Kbytes |
RAM Space for Kernel | 300 bytes + 128 bytes Main Stack |
RAM Space for a Thread | StackSize + 52 bytes |
RAM Space for a Mailbox | MaxMessages * 4 + 16 bytes |
RAM Space for a Semaphore | 8 bytes |
RAM Space for a Mutex | 12 bytes |
RAM Space for a User Timer | 24 bytes |
Hardware Requirements | SysTick timer or other hardware timer |
Thread context switch time | < 2.6 usec @ 72 MHz |
Interrupt lockout time | Not disabled |