From 8bd373b8a43ec885a2ac783db1201e6dd92fa4f5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bruno=20Ryb=C3=A1rsky?= Date: Mon, 11 May 2026 15:17:49 +0200 Subject: [PATCH] continue work on es8311 --- main/drivers/es8311.c | 168 ++++++++++------ main/drivers/es8311.h | 441 +++++++++++++++++++++++++++++++++--------- main/main.c | 4 +- 3 files changed, 465 insertions(+), 148 deletions(-) diff --git a/main/drivers/es8311.c b/main/drivers/es8311.c index 02482d0..31c15bf 100644 --- a/main/drivers/es8311.c +++ b/main/drivers/es8311.c @@ -9,6 +9,7 @@ #include "i2c.h" #include "pins.h" #include +#include i2c_master_dev_handle_t es8311_i2c_dev; @@ -21,14 +22,29 @@ int es8311_write(uint8_t reg, uint8_t val) { return 0; } - -void es8311_set_dac_volume(uint8_t vol) { - es8311_write(ES8311_DAC_VOL_L, vol); - es8311_write(ES8311_DAC_VOL_R, vol); +void es8311_set_dac_volume(float vol) { + if (vol < -95.5f) { + vol = -95.5f; + } + if (vol > 32) { + vol = 32; + } + vol *= 2; + uint8_t volByte = vol; + es8311_write(ES8311_DAC_REG32, volByte); } -void es8311_set_adc_volume(uint8_t vol) { es8311_write(ES8311_ADC_VOL, vol); } - +void es8311_set_adc_volume(float vol) { + if (vol < -95.5f) { + vol = -95.5f; + } + if (vol > 32) { + vol = 32; + } + vol *= 2; + uint8_t volByte = vol; + es8311_write(ES8311_ADC_REG17, volByte); +} uint8_t es8311_read(uint8_t reg) { uint8_t val; @@ -40,18 +56,6 @@ uint8_t es8311_read(uint8_t reg) { return val; } - - - -void es8311_verify_init(void) { - printf("ES8311 Register Dump:\n"); - printf("PWR_UP_DOWN (0x0C): 0x%02X\n", es8311_read(0x0C)); - printf("PWR_ANALOG (0x0D): 0x%02X\n", es8311_read(0x0D)); - printf("SER_FMT (0x10): 0x%02X\n", es8311_read(0x10)); - printf("DAC_VOL_L (0x33): 0x%02X\n", es8311_read(0x33)); - printf("DAC_VOL_R (0x34): 0x%02X\n", es8311_read(0x34)); -} - void es8311_init(void) { printf("ES8311: Starting initialization...\n"); @@ -66,55 +70,105 @@ void es8311_init(void) { return; } - // Reset chip - printf("ES8311: Resetting...\n"); - es8311_write(ES8311_RESET, ES8311_RESET_CMD); - vTaskDelay(pdMS_TO_TICKS(ES8311_RESET_DELAY_MS)); + es8311_write(ES8311_SDPIN_REG, + ES8311_SDPIN_FORMAT_I2S | ES8311_SDPIN_WORD_24BIT | + ES8311_SDPIN_LR_NORMAL_POLARITY | ES8311_SDPIN_UNMUTE | + ES8311_SDPIN_SEL_LEFT_TO_DAC); - // Configure clock - printf("ES8311: Configuring clocks...\n"); - es8311_write(ES8311_CLK_MANAGE, ES8311_CLK_ALL_EN); - es8311_write(ES8311_CLK_DIV, ES8311_CLK_DIV_DEFAULT); + es8311_write(ES8311_SDPOUT_REG, + ES8311_SDPOUT_FORMAT_I2S | ES8311_SDPOUT_WORD_24BIT | + ES8311_SDPOUT_LR_NORMAL_POLARITY | ES8311_SDPOUT_UNMUTE); - // Power up sequence - printf("ES8311: Powering up...\n"); - es8311_write(ES8311_PWR_ANALOG, ES8311_PWR_ANALOG_OFF); - vTaskDelay(pdMS_TO_TICKS(ES8311_POWER_DELAY_MS)); + es8311_write(ES8311_RESET_REG00, + ES8311_RESET_CSM_MSC_SLAVE | ES8311_RESET_CSM_ON); - es8311_write(ES8311_PWR_ANALOG, ES8311_PWR_ANALOG_ON); - vTaskDelay(pdMS_TO_TICKS(ES8311_POWER_DELAY_MS)); + es8311_write(ES8311_CLK_MANAGER_REG07, + ES8311_CLK_MANAGER_REG07_ADCDAT_NORMAL_MODE | + ES8311_CLK_MANAGER_REG07_BCLK_LRCLK_NORMAL_MODE); - // I2S format - printf("ES8311: Configuring I2S format...\n"); - es8311_write(ES8311_SER_FMT, ES8311_FMT_I2S | ES8311_WORD_LEN_16); + es8311_write(ES8311_CLK_MANAGER_REG01, + ES8311_CLK_MANAGER_REG01_MCLK_INV_OFF | + ES8311_CLK_MANAGER_REG01_MCLK_OFF | + ES8311_CLK_MANAGER_REG01_MCLK_SEL_FROM_BCLK | + ES8311_CLK_MANAGER_REG01_BCLK_OFF); - // ADC configuration - printf("ES8311: Configuring ADC...\n"); - es8311_write(ES8311_ADC_CTRL1, ES8311_ADC_CTRL1_DEFAULT); - es8311_write(ES8311_ADC_CTRL2, ES8311_ADC_CTRL2_DEFAULT); - es8311_set_adc_volume(ES8311_ADC_VOL_DEFAULT); + // mclk 12.288 MHz LRCK 48kHz + es8311_write(ES8311_CLK_MANAGER_REG02, 0x00); + es8311_write(ES8311_CLK_MANAGER_REG03, 0x10); + es8311_write(ES8311_CLK_MANAGER_REG04, 0x10); + es8311_write(ES8311_CLK_MANAGER_REG05, 0x00); + es8311_write(ES8311_ADC_REG16, 0x04); // 24 db gain + // off in slave mode, we dont care + es8311_write(ES8311_CLK_MANAGER_REG06, + ES8311_CLK_MANAGER_REG06_CONTINUAL_BCLK | + ES8311_CLK_MANAGER_REG06_NORMAL_BCLK | + ES8311_CLK_MANAGER_REG06_DIV_BCLK_3); - // DAC configuration - printf("ES8311: Configuring DAC...\n"); - es8311_write(ES8311_DAC_CTRL1, ES8311_DAC_CTRL1_DEFAULT); - es8311_write(ES8311_DAC_CTRL2, ES8311_DAC_CTRL2_DEFAULT); - es8311_set_dac_volume(ES8311_DAC_VOL_DEFAULT); + // lrck divider is ignored, since we are in slave mode - // Output configuration - printf("ES8311: Configuring outputs...\n"); - es8311_write(ES8311_HP_CTRL, ES8311_HP_CTRL_DEFAULT); - es8311_write(ES8311_SPK_CTRL, ES8311_SPK_CTRL_MAX); + es8311_write(ES8311_RESET_REG00, + ES8311_RESET_CSM_MSC_SLAVE | ES8311_RESET_CSM_ON | + ES8311_RESET_DIGITAL_RUN | ES8311_RESET_CLOCK_MANAGER_RUN | + ES8311_RESET_MASTER_RUN | ES8311_RESET_ADC_DIGITAL_RUN | + ES8311_RESET_DAC_DIGITAL_RUN); - // Enable ADC and DAC - printf("ES8311: Enabling ADC/DAC...\n"); - es8311_write(ES8311_PWR_UP_DOWN, ES8311_PWR_DAC_EN | ES8311_PWR_ADC_EN); - vTaskDelay(pdMS_TO_TICKS(ES8311_STARTUP_DELAY_MS)); + es8311_write(ES8311_SYSTEM_REG0D, + ES8311_SYSTEM_REG0D_ANALOG_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_BIAS_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_ADC_BIAS_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_ADC_REFERENCE_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_DAC_REFERENCE_ENABLED | + ES8311_SYSTEM_REG0D_VMID_START_NORMAL_SPEED); - printf("ES8311: Initializing I2S...\n"); - audio_i2s_init(); + es8311_write(ES8311_SYSTEM_REG0D, + ES8311_SYSTEM_REG0D_ANALOG_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_BIAS_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_ADC_BIAS_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_ADC_REFERENCE_ENABLED | + ES8311_SYSTEM_REG0D_ANALOG_DAC_REFERENCE_ENABLED | + ES8311_SYSTEM_REG0D_VMID_NORMAL); - printf("ES8311: Initialization complete\n"); - es8311_verify_init(); + es8311_write(ES8311_SYSTEM_REG0F, + ES8311_SYSTEM_REG0F_DAC_NORMAL_MODE | + ES8311_SYSTEM_REG0F_PGA_NORMAL_MODE | + ES8311_SYSTEM_REG0F_PGA_OUTPUT_NORMAL_MODE | + ES8311_SYSTEM_REG0F_VCMMOD_NORMAL_MODE | + ES8311_SYSTEM_REG0F_ADC_REFERENCE_NORMAL_MODE | + ES8311_SYSTEM_REG0F_DAC_REFERENCE_NORMAL_MODE | + ES8311_SYSTEM_REG0F_FLASH_NORMAL_MODE | + ES8311_SYSTEM_REG0F_INT1_NORMAL_MODE); + + es8311_write(ES8311_SYSTEM_REG0E, + ES8311_SYSTEM_REG0E_PGA_ENABLE | + ES8311_SYSTEM_REG0E_PDN_MOD_ENABLE | + ES8311_SYSTEM_REG0E_MOD_NORMAL + ); + + es8311_write(ES8311_SYSTEM_REG14, + ES8311_SYSTEM_REG14_DMIC_OFF | + ES8311_SYSTEM_REG14_MIC1 | + ES8311_SYSTEM_REG14_GAIN_30DB + ); + + es8311_write(ES8311_ADC_REG1C, + ES8311_ADC_REG1C_HPF_DYNAMIC_HPF | + ES8311_ADC_REG1C_ADCEQ_BYPASS + ); + es8311_write(ES8311_ADC_REG18, + ES8311_ADC_REG18_AUTO_LEVEL_CONTROL_ENABLE | + ES8311_ADC_REG18_AUTO_MUTE_DISABLE | + ES8311_ADC_REG18_0_25DB_PER_65536LRCK + ); + + es8311_write(ES8311_ADC_REG19, + ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_30_1DB | + ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_6_0DB + ); + + es8311_write(ES8311_ADC_REG1A, + ES8311_ADC_REG1A_AUTOMUTE_NEG_96DB | + ES8311_ADC_REG1A_AUTOMUTE_32768_SAMPLES + ); } int audio_write(const int16_t *samples, size_t count) { diff --git a/main/drivers/es8311.h b/main/drivers/es8311.h index 1bbed0d..0cdda1e 100644 --- a/main/drivers/es8311.h +++ b/main/drivers/es8311.h @@ -6,99 +6,363 @@ // ---------------------- // I2C // ---------------------- +#define ES8311_RESET_REG00 0x00 /*reset digital,csm,clock manager etc.*/ +#define ES8311_RESET_CSM_OFF (0 << 7) +#define ES8311_RESET_CSM_ON (1 << 7) +#define ES8311_RESET_CSM_MSC_SLAVE (0 << 6) +#define ES8311_RESET_CSM_MSC_MASTER (1 << 6) +// #define ES8311_RESET_CSM_MSC_SLAVE (0 << 5) +// #define ES8311_RESET_CSM_MSC_MASTER (1 << 5) +#define ES8311_RESET_DIGITAL_RUN (0 << 4) +#define ES8311_RESET_DIGITAL_RST (1 << 4) +#define ES8311_RESET_CLOCK_MANAGER_RUN (0 << 3) +#define ES8311_RESET_CLOCK_MANAGER_RST (1 << 3) +#define ES8311_RESET_MASTER_RUN (0 << 2) +#define ES8311_RESET_MASTER_RST (1 << 2) +#define ES8311_RESET_ADC_DIGITAL_RUN (0 << 1) +#define ES8311_RESET_ADC_DIGITAL_RST (1 << 1) +#define ES8311_RESET_DAC_DIGITAL_RUN (0 << 0) +#define ES8311_RESET_DAC_DIGITAL_RST (1 << 0) -// ---------------------- -// System -// ---------------------- -#define ES8311_RESET 0x00 -#define ES8311_CLK_MANAGE 0x01 -#define ES8311_CLK_DIV 0x02 +/* + * Clock Scheme Register definition + */ +#define ES8311_CLK_MANAGER_REG01 \ + 0x01 /* select clk src for mclk, enable clock for codec */ +#define ES8311_CLK_MANAGER_REG01_MCLK_SEL_FROM_MCLK (0 << 7) +#define ES8311_CLK_MANAGER_REG01_MCLK_SEL_FROM_BCLK (1 << 7) +#define ES8311_CLK_MANAGER_REG01_MCLK_INV_OFF (0 << 6) +#define ES8311_CLK_MANAGER_REG01_MCLK_INV_ON (1 << 6) +#define ES8311_CLK_MANAGER_REG01_MCLK_OFF (0 << 5) +#define ES8311_CLK_MANAGER_REG01_MCLK_ON (1 << 5) +#define ES8311_CLK_MANAGER_REG01_BCLK_OFF (0 << 4) +#define ES8311_CLK_MANAGER_REG01_BCLK_ON (1 << 4) -// ---------------------- -// Power -// ---------------------- -#define ES8311_PWR_UP_DOWN 0x0C -#define ES8311_PWR_ANALOG 0x0D +#define ES8311_CLK_MANAGER_REG02 0x02 /* clk divider and clk multiplier */ +#define ES8311_CLK_MANAGER_REG03 0x03 /* adc fsmode and osr */ +#define ES8311_CLK_MANAGER_REG04 0x04 /* dac osr */ +#define ES8311_CLK_MANAGER_REG05 0x05 /* clk divier for adc and dac */ -#define ES8311_PWR_DAC_EN (1 << 0) -#define ES8311_PWR_ADC_EN (1 << 1) - -// ---------------------- -// Audio format -// ---------------------- -#define ES8311_SER_FMT 0x10 - -#define ES8311_FMT_I2S 0x18 -#define ES8311_FMT_LEFT 0x10 - -#define ES8311_WORD_LEN_16 0x10 -#define ES8311_WORD_LEN_24 0x20 - -// ---------------------- -// ADC -// ---------------------- -#define ES8311_ADC_CTRL1 0x14 -#define ES8311_ADC_CTRL2 0x15 - -#define ES8311_ADC_VOL 0x16 - -// ---------------------- -// DAC -// ---------------------- -#define ES8311_DAC_CTRL1 0x17 -#define ES8311_DAC_CTRL2 0x18 - -#define ES8311_DAC_VOL_L 0x33 -#define ES8311_DAC_VOL_R 0x34 - -// ---------------------- -// Output -// ---------------------- -#define ES8311_HP_CTRL 0x31 -#define ES8311_SPK_CTRL 0x32 - -// ---------------------- -// Common -// ---------------------- -#define ES8311_RESET_CMD 0x1F -#define ES8311_ALL_ON 0xFF +#define ES8311_CLK_MANAGER_REG06 0x06 /* bclk inverter and divider */ +#define ES8311_CLK_MANAGER_REG06_CONTINUAL_BCLK (0 << 6) +#define ES8311_CLK_MANAGER_REG06_WHEN_DATA_TRANSFER_BCLK (1 << 6) +#define ES8311_CLK_MANAGER_REG06_NORMAL_BCLK (0 << 5) +#define ES8311_CLK_MANAGER_REG06_INVERT_BCLK (1 << 5) +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_1 0x00 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_2 0x01 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_3 0x02 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_4 0x03 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_5 0x04 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_6 0x05 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_7 0x06 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_8 0x07 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_9 0x08 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_10 0x09 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_11 0x0A +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_12 0x0B +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_13 0x0C +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_14 0x0D +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_15 0x0E +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_16 0x0F +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_17 0x10 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_18 0x11 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_19 0x12 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_20 0x13 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_22 0x14 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_24 0x15 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_25 0x16 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_30 0x17 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_32 0x18 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_33 0x19 +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_34 0x1A +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_36 0x1B +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_44 0x1C +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_48 0x1D +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_66 0x1E +#define ES8311_CLK_MANAGER_REG06_DIV_BCLK_72 0x1F -// ---------------------- -// Clock Management Values -// ---------------------- -#define ES8311_CLK_ALL_EN 0x3F // Enable all clocks -#define ES8311_CLK_DIV_DEFAULT 0x00 // Default divider +#define ES8311_CLK_MANAGER_REG07 0x07 /* tri-state, lrck divider */ +#define ES8311_CLK_MANAGER_REG07_BCLK_LRCLK_NORMAL_MODE (0 << 5) +#define ES8311_CLK_MANAGER_REG07_BCLK_LRCLK_TRISTATE_MODE (1 << 5) +#define ES8311_CLK_MANAGER_REG07_ADCDAT_NORMAL_MODE (0 << 4) +#define ES8311_CLK_MANAGER_REG07_ADCDAT_TRISTATE_MODE (1 << 4) +#define ES8311_CLK_MANAGER_REG08 0x08 /* lrck divider */ +/* + * SDP + */ +#define ES8311_SDPIN_REG 0x09 +#define ES8311_SDPIN_SEL_LEFT_TO_DAC (0 << 7) +#define ES8311_SDPIN_SEL_RIGHT_TO_DAC (1 << 7) +#define ES8311_SDPIN_UNMUTE (0 << 6) +#define ES8311_SDPIN_MUTE (1 << 6) +#define ES8311_SDPIN_LR_NORMAL_POLARITY (0 << 5) +#define ES8311_SDPIN_LR_INVERTED_POLARITY (1 << 5) +#define ES8311_SDPIN_WORD_24BIT (0 << 2) +#define ES8311_SDPIN_WORD_20BIT (1 << 2) +#define ES8311_SDPIN_WORD_18BIT (2 << 2) +#define ES8311_SDPIN_WORD_16BIT (3 << 2) +#define ES8311_SDPIN_WORD_32BIT (4 << 2) +#define ES8311_SDPIN_FORMAT_I2S (0 << 0) +#define ES8311_SDPIN_FORMAT_LEFT_JUSTIFY_SERIAL (1 << 0) +#define ES8311_SDPIN_FORMAT_PCM (3 << 0) -// ---------------------- -// Power Analog Values -// ---------------------- -#define ES8311_PWR_ANALOG_OFF 0x00 // All analog blocks off -#define ES8311_PWR_ANALOG_ON 0xBF // Power up analog circuits +#define ES8311_SDPOUT_REG 0x0A +#define ES8311_SDPOUT_UNMUTE (0 << 6) +#define ES8311_SDPOUT_MUTE (1 << 6) +#define ES8311_SDPOUT_LR_NORMAL_POLARITY (0 << 5) +#define ES8311_SDPOUT_LR_INVERTED_POLARITY (1 << 5) +#define ES8311_SDPOUT_WORD_24BIT (0 << 2) +#define ES8311_SDPOUT_WORD_20BIT (1 << 2) +#define ES8311_SDPOUT_WORD_18BIT (2 << 2) +#define ES8311_SDPOUT_WORD_16BIT (3 << 2) +#define ES8311_SDPOUT_WORD_32BIT (4 << 2) +#define ES8311_SDPOUT_FORMAT_I2S (0 << 0) +#define ES8311_SDPOUT_FORMAT_LEFT_JUSTIFY_SERIAL (1 << 0) +#define ES8311_SDPOUT_FORMAT_PCM (3 << 0) +/* + * SYSTEM + */ +#define ES8311_SYSTEM_REG0B 0x0B /* system */ +#define ES8311_SYSTEM_REG0C 0x0C /* system */ -// ---------------------- -// ADC Control Values -// ---------------------- -#define ES8311_ADC_CTRL1_DEFAULT 0x44 // TODO: Document bit meanings -#define ES8311_ADC_CTRL2_DEFAULT 0x0C // TODO: Document bit meanings +#define ES8311_SYSTEM_REG0D 0x0D /* system, power up/down */ +#define ES8311_SYSTEM_REG0D_ANALOG_ENABLED (0 << 7) +#define ES8311_SYSTEM_REG0D_ANALOG_DISABLED (1 << 7) +#define ES8311_SYSTEM_REG0D_ANALOG_BIAS_ENABLED (0 << 6) +#define ES8311_SYSTEM_REG0D_ANALOG_BIAS_DISABLED (1 << 6) +#define ES8311_SYSTEM_REG0D_ANALOG_ADC_BIAS_ENABLED (0 << 5) +#define ES8311_SYSTEM_REG0D_ANALOG_ADC_BIAS_DISABLED (1 << 5) +#define ES8311_SYSTEM_REG0D_ANALOG_ADC_REFERENCE_ENABLED (0 << 4) +#define ES8311_SYSTEM_REG0D_ANALOG_ADC_REFERENCE_DISABLED (1 << 4) +#define ES8311_SYSTEM_REG0D_ANALOG_DAC_REFERENCE_ENABLED (0 << 3) +#define ES8311_SYSTEM_REG0D_ANALOG_DAC_REFERENCE_DISABLED (1 << 3) +#define ES8311_SYSTEM_REG0D_VMID_POWER_DOWN 0x00 +#define ES8311_SYSTEM_REG0D_VMID_START_NORMAL_SPEED 0x01 +#define ES8311_SYSTEM_REG0D_VMID_NORMAL 0x02 +#define ES8311_SYSTEM_REG0D_VMID_START_FAST_SPEED 0x03 -// ---------------------- -// DAC Control Values -// ---------------------- -#define ES8311_DAC_CTRL1_DEFAULT 0x04 // TODO: Document bit meanings -#define ES8311_DAC_CTRL2_DEFAULT 0x0C // TODO: Document bit meanings -// ---------------------- -// Output Control Values -// ---------------------- -#define ES8311_HP_CTRL_DEFAULT 0xF0 // TODO: Document bit meanings -#define ES8311_SPK_CTRL_MAX 0xFF // Maximum speaker output +#define ES8311_SYSTEM_REG0E 0x0E /* system, power up/down */ +#define ES8311_SYSTEM_REG0E_PGA_ENABLE (0 << 6) +#define ES8311_SYSTEM_REG0E_PGA_DISABLE (1 << 6) +#define ES8311_SYSTEM_REG0E_PDN_MOD_ENABLE (0 << 5) +#define ES8311_SYSTEM_REG0E_PDN_MOD_DISABLE (1 << 5) +#define ES8311_SYSTEM_REG0E_MOD_NORMAL (0 << 4) +#define ES8311_SYSTEM_REG0E_MOD_RESET (1 << 4) -// ---------------------- -// Volume Defaults -// ---------------------- -#define ES8311_DAC_VOL_DEFAULT 0xBF // ~75% volume -#define ES8311_ADC_VOL_DEFAULT 0x88 // ~50% gain + +#define ES8311_SYSTEM_REG0F 0x0F /* system, low power */ + +#define ES8311_SYSTEM_REG0F_DAC_NORMAL_MODE (0 << 7) +#define ES8311_SYSTEM_REG0F_DAC_LOW_POWER_MODE (1 << 7) +#define ES8311_SYSTEM_REG0F_PGA_NORMAL_MODE (0 << 6) +#define ES8311_SYSTEM_REG0F_PGA_LOW_POWER_MODE (1 << 6) +#define ES8311_SYSTEM_REG0F_PGA_OUTPUT_NORMAL_MODE (0 << 5) +#define ES8311_SYSTEM_REG0F_PGA_OUTPUT_LOW_POWER_MODE (1 << 5) +#define ES8311_SYSTEM_REG0F_VCMMOD_NORMAL_MODE (0 << 4) +#define ES8311_SYSTEM_REG0F_VCMMOD_LOW_POWER_MODE (1 << 4) +#define ES8311_SYSTEM_REG0F_ADC_REFERENCE_NORMAL_MODE (0 << 3) +#define ES8311_SYSTEM_REG0F_ADC_REFERENCE_LOW_POWER_MODE (1 << 3) +#define ES8311_SYSTEM_REG0F_DAC_REFERENCE_NORMAL_MODE (0 << 2) +#define ES8311_SYSTEM_REG0F_DAC_REFERENCE_LOW_POWER_MODE (1 << 2) +#define ES8311_SYSTEM_REG0F_FLASH_NORMAL_MODE (0 << 1) +#define ES8311_SYSTEM_REG0F_FLASH_LOW_POWER_MODE (1 << 1) +#define ES8311_SYSTEM_REG0F_INT1_NORMAL_MODE (0 << 0) +#define ES8311_SYSTEM_REG0F_INT1_LOW_POWER_MODE (1 << 0) + + + + +#define ES8311_SYSTEM_REG10 0x10 /* system */ +#define ES8311_SYSTEM_REG11 0x11 /* system */ +#define ES8311_SYSTEM_REG12 0x12 /* system, Enable DAC */ +#define ES8311_SYSTEM_REG13 0x13 /* system */ +#define ES8311_SYSTEM_REG14 \ + 0x14 /* system, select DMIC, select analog pga gain */ + +#define ES8311_SYSTEM_REG14_DMIC_OFF (0 << 6) +#define ES8311_SYSTEM_REG14_DMIC_AND_DMIC_SDA (1 << 6) +#define ES8311_SYSTEM_REG14_NO_MIC (0 << 4) +#define ES8311_SYSTEM_REG14_MIC1 (1 << 4) +#define ES8311_SYSTEM_REG14_MIC2 (2 << 4) +#define ES8311_SYSTEM_REG14_MIC1_MIC2 (3 << 4) +#define ES8311_SYSTEM_REG14_GAIN_0DB 0 +#define ES8311_SYSTEM_REG14_GAIN_3DB 1 +#define ES8311_SYSTEM_REG14_GAIN_6DB 2 +#define ES8311_SYSTEM_REG14_GAIN_9DB 3 +#define ES8311_SYSTEM_REG14_GAIN_12DB 4 +#define ES8311_SYSTEM_REG14_GAIN_15DB 5 +#define ES8311_SYSTEM_REG14_GAIN_18DB 6 +#define ES8311_SYSTEM_REG14_GAIN_21DB 7 +#define ES8311_SYSTEM_REG14_GAIN_24DB 8 +#define ES8311_SYSTEM_REG14_GAIN_27DB 9 +#define ES8311_SYSTEM_REG14_GAIN_30DB 10 + + + +/* + * ADC + */ +#define ES8311_ADC_REG15 0x15 /* ADC, adc ramp rate, dmic sense */ +#define ES8311_ADC_REG16 0x16 /* ADC */ +#define ES8311_ADC_REG16_ADC_RAM_CLR (1 << 3) +#define ES8311_ADC_REG17 0x17 /* ADC, volume */ +#define ES8311_ADC_REG18 0x18 /* ADC, alc enable and winsize */ +#define ES8311_ADC_REG18_AUTO_LEVEL_CONTROL_DISABLE (0 << 7) +#define ES8311_ADC_REG18_AUTO_LEVEL_CONTROL_ENABLE (1 << 7) +#define ES8311_ADC_REG18_AUTO_MUTE_DISABLE (0 << 6) +#define ES8311_ADC_REG18_AUTO_MUTE_ENABLE (1 << 6) +#define ES8311_ADC_REG18_0_25DB_PER_2LRCK 0x00 +#define ES8311_ADC_REG18_0_25DB_PER_4LRCK 0x01 +#define ES8311_ADC_REG18_0_25DB_PER_8LRCK 0x02 +#define ES8311_ADC_REG18_0_25DB_PER_16LRCK 0x03 +#define ES8311_ADC_REG18_0_25DB_PER_32LRCK 0x04 +#define ES8311_ADC_REG18_0_25DB_PER_64LRCK 0x05 +#define ES8311_ADC_REG18_0_25DB_PER_128LRCK 0x06 +#define ES8311_ADC_REG18_0_25DB_PER_256LRCK 0x07 +#define ES8311_ADC_REG18_0_25DB_PER_512LRCK 0x08 +#define ES8311_ADC_REG18_0_25DB_PER_1024LRCK 0x09 +#define ES8311_ADC_REG18_0_25DB_PER_2048LRCK 0x0A +#define ES8311_ADC_REG18_0_25DB_PER_4096LRCK 0x0B +#define ES8311_ADC_REG18_0_25DB_PER_8192LRCK 0x0C +#define ES8311_ADC_REG18_0_25DB_PER_16384LRCK 0x0D +#define ES8311_ADC_REG18_0_25DB_PER_32768LRCK 0x0E +#define ES8311_ADC_REG18_0_25DB_PER_65536LRCK 0x0F + + +#define ES8311_ADC_REG19 0x19 /* ADC, alc maxlevel */ +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_30_1DB (0x00 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_24_1DB (0x01 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_20_6DB (0x02 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_18_1DB (0x03 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_16_1DB (0x04 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_14_5DB (0x05 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_13_2DB (0x06 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_12_0DB (0x07 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_11_0DB (0x08 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_10_1DB (0x09 << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_9_3DB (0x0A << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_8_5DB (0x0B << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_7_8DB (0x0C << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_7_2DB (0x0D << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_6_6DB (0x0E << 4) +#define ES8311_ADC_REG19_ALC_MAX_LEVEL_NEG_6_0DB (0x0F << 4) + +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_30_1DB (0x00 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_24_1DB (0x01 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_20_6DB (0x02 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_18_1DB (0x03 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_16_1DB (0x04 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_14_5DB (0x05 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_13_2DB (0x06 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_12_0DB (0x07 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_11_0DB (0x08 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_10_1DB (0x09 << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_9_3DB (0x0A << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_8_5DB (0x0B << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_7_8DB (0x0C << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_7_2DB (0x0D << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_6_6DB (0x0E << 0) +#define ES8311_ADC_REG19_ALC_MIN_LEVEL_NEG_6_0DB (0x0F << 0) + + +#define ES8311_ADC_REG1A 0x1A /* ADC, alc automute */ +#define ES8311_ADC_REG1A_AUTOMUTE_2048_SAMPLES (0x00 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_4096_SAMPLES (0x01 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_6144_SAMPLES (0x02 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_8192_SAMPLES (0x03 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_10240_SAMPLES (0x04 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_12288_SAMPLES (0x05 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_14336_SAMPLES (0x06 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_16384_SAMPLES (0x07 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_18432_SAMPLES (0x08 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_20480_SAMPLES (0x09 << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_22528_SAMPLES (0x0A << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_24576_SAMPLES (0x0B << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_26624_SAMPLES (0x0C << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_28672_SAMPLES (0x0D << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_30720_SAMPLES (0x0E << 4) +#define ES8311_ADC_REG1A_AUTOMUTE_32768_SAMPLES (0x0F << 4) + +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_96DB (0x00 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_90DB (0x01 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_84DB (0x02 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_78DB (0x03 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_72DB (0x04 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_66DB (0x05 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_60DB (0x06 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_54DB (0x07 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_51DB (0x08 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_48DB (0x09 << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_45DB (0x0A << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_42DB (0x0B << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_39DB (0x0C << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_36DB (0x0D << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_33DB (0x0E << 0) +#define ES8311_ADC_REG1A_AUTOMUTE_NEG_30DB (0x0F << 0) + + +#define ES8311_ADC_REG1B 0x1B /* ADC, alc automute, adc hpf s1 */ +// bits 4:0 have ADCHPF stage 1 coefficient - reg1b +#define ES8311_ADC_REG1C 0x1C /* ADC, equalizer, hpf s2 */ +#define ES8311_ADC_REG1C_ADCEQ_NORMAL (0 << 6) +#define ES8311_ADC_REG1C_ADCEQ_BYPASS (1 << 6) +#define ES8311_ADC_REG1C_HPF_FREEZE_OFFSET (0 << 5) +#define ES8311_ADC_REG1C_HPF_DYNAMIC_HPF (1 << 5) +// bits 4:0 have ADCHPF stage 2 coefficient - reg1c + +/* +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_A1[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_A1[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_A1[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_A1[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +reg1d - ADCEQ_B0[29:24] - bit 5:0 30-bit B0 coefficient for ADCEQ +*/ +/* + * DAC + */ +#define ES8311_DAC_REG31 0x31 /* DAC, mute */ +#define ES8311_DAC_REG32 0x32 /* DAC, volume */ +#define ES8311_DAC_REG33 0x33 /* DAC, offset */ +#define ES8311_DAC_REG34 0x34 /* DAC, drc enable, drc winsize */ +#define ES8311_DAC_REG35 0x35 /* DAC, drc maxlevel, minilevel */ +#define ES8311_DAC_REG37 0x37 /* DAC, ramprate */ +/* + *GPIO + */ +#define ES8311_GPIO_REG44 0x44 /* GPIO, dac2adc for test */ +#define ES8311_GP_REG45 0x45 /* GP CONTROL */ +/* + * CHIP + */ +#define ES8311_CHD1_REGFD 0xFD /* CHIP ID1 */ +#define ES8311_CHD2_REGFE 0xFE /* CHIP ID2 */ +#define ES8311_CHVER_REGFF 0xFF /* VERSION */ +#define ES8311_CHD1_REGFD 0xFD /* CHIP ID1 */ + +#define ES8311_MAX_REGISTER 0xFF + +typedef enum { + ES8311_MIC_GAIN_MIN = -1, + ES8311_MIC_GAIN_0DB, + ES8311_MIC_GAIN_6DB, + ES8311_MIC_GAIN_12DB, + ES8311_MIC_GAIN_18DB, + ES8311_MIC_GAIN_24DB, + ES8311_MIC_GAIN_30DB, + ES8311_MIC_GAIN_36DB, + ES8311_MIC_GAIN_42DB, + ES8311_MIC_GAIN_MAX +} es8311_mic_gain_t; // ---------------------- // Timing Constants (milliseconds) @@ -110,15 +374,14 @@ // ---------------------- // Beep Configuration // ---------------------- -#define ES8311_BEEP_DURATION_SAMPLES 4410 // 100ms at 44.1kHz -#define ES8311_BEEP_AMPLITUDE 12000 // ~36% of 16-bit max -#define ES8311_BEEP_HALF_PERIOD 20 // ~2.2kHz tone - +#define ES8311_BEEP_DURATION_SAMPLES 4410 // 100ms at 44.1kHz +#define ES8311_BEEP_AMPLITUDE 12000 // ~36% of 16-bit max +#define ES8311_BEEP_HALF_PERIOD 20 // ~2.2kHz tone void es8311_init(void); -void es8311_set_dac_volume(uint8_t vol); -void es8311_set_adc_volume(uint8_t vol); +void es8311_set_dac_volume(float vol); +void es8311_set_adc_volume(float vol); int audio_write(const int16_t *samples, size_t count); diff --git a/main/main.c b/main/main.c index 73e68b1..3079ad3 100644 --- a/main/main.c +++ b/main/main.c @@ -69,7 +69,7 @@ void app_main(void) { printf("%s\n", buf); st7789_draw_string(30, 30, buf, 0x07E0, 0x0000, true, fontHitachi); - audio_beep(); + //audio_test_tone(); } bmi270_data_t bmiData; @@ -85,7 +85,7 @@ void app_main(void) { snprintf(buf, sizeof(buf), "BAT: %d%%(%.3fV)", getBatteryPercentage(), getBatteryVoltage()); - st7789_draw_string(150, 10, buf, 0x07E0, 0x0000, true, fontHitachi); + st7789_draw_string(140, 10, buf, 0x07E0, 0x0000, true, fontHitachi); st7789_flush(); vTaskDelay(pdMS_TO_TICKS(20)); // 50 fps max