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261
managed_components/espressif__esp32-camera/driver/sccb.c
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261
managed_components/espressif__esp32-camera/driver/sccb.c
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/*
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* This file is part of the OpenMV project.
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* Copyright (c) 2013/2014 Ibrahim Abdelkader <i.abdalkader@gmail.com>
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* This work is licensed under the MIT license, see the file LICENSE for details.
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*
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* SCCB (I2C like) driver.
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*
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*/
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#include <stdbool.h>
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#include <string.h>
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#include <freertos/FreeRTOS.h>
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#include <freertos/task.h>
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#include "sccb.h"
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#include "sensor.h"
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#include <stdio.h>
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#include "sdkconfig.h"
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#if defined(ARDUINO_ARCH_ESP32) && defined(CONFIG_ARDUHAL_ESP_LOG)
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#include "esp32-hal-log.h"
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#else
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#include "esp_log.h"
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static const char* TAG = "sccb";
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#endif
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#define LITTLETOBIG(x) ((x<<8)|(x>>8))
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#include "driver/i2c.h"
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// support IDF 5.x
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#ifndef portTICK_RATE_MS
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#define portTICK_RATE_MS portTICK_PERIOD_MS
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#endif
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#define SCCB_FREQ CONFIG_SCCB_CLK_FREQ /*!< I2C master frequency*/
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#define WRITE_BIT I2C_MASTER_WRITE /*!< I2C master write */
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#define READ_BIT I2C_MASTER_READ /*!< I2C master read */
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#define ACK_CHECK_EN 0x1 /*!< I2C master will check ack from slave*/
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#define ACK_CHECK_DIS 0x0 /*!< I2C master will not check ack from slave */
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#define ACK_VAL 0x0 /*!< I2C ack value */
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#define NACK_VAL 0x1 /*!< I2C nack value */
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#if CONFIG_SCCB_HARDWARE_I2C_PORT1
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const int SCCB_I2C_PORT_DEFAULT = 1;
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#else
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const int SCCB_I2C_PORT_DEFAULT = 0;
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#endif
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static int sccb_i2c_port;
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static bool sccb_owns_i2c_port;
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int SCCB_Init(int pin_sda, int pin_scl)
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{
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ESP_LOGI(TAG, "pin_sda %d pin_scl %d", pin_sda, pin_scl);
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i2c_config_t conf;
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esp_err_t ret;
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memset(&conf, 0, sizeof(i2c_config_t));
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sccb_i2c_port = SCCB_I2C_PORT_DEFAULT;
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sccb_owns_i2c_port = true;
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ESP_LOGI(TAG, "sccb_i2c_port=%d", sccb_i2c_port);
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conf.mode = I2C_MODE_MASTER;
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conf.sda_io_num = pin_sda;
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conf.sda_pullup_en = GPIO_PULLUP_ENABLE;
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conf.scl_io_num = pin_scl;
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conf.scl_pullup_en = GPIO_PULLUP_ENABLE;
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conf.master.clk_speed = SCCB_FREQ;
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if ((ret = i2c_param_config(sccb_i2c_port, &conf)) != ESP_OK) {
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return ret;
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}
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return i2c_driver_install(sccb_i2c_port, conf.mode, 0, 0, 0);
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}
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int SCCB_Use_Port(int i2c_num) { // sccb use an already initialized I2C port
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if (sccb_owns_i2c_port) {
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SCCB_Deinit();
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}
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if (i2c_num < 0 || i2c_num > I2C_NUM_MAX) {
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return ESP_ERR_INVALID_ARG;
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}
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sccb_i2c_port = i2c_num;
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return ESP_OK;
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}
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int SCCB_Deinit(void)
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{
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if (!sccb_owns_i2c_port) {
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return ESP_OK;
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}
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sccb_owns_i2c_port = false;
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return i2c_driver_delete(sccb_i2c_port);
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}
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uint8_t SCCB_Probe(void)
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{
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uint8_t slave_addr = 0x0;
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for (size_t i = 0; i < CAMERA_MODEL_MAX; i++) {
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if (slave_addr == camera_sensor[i].sccb_addr) {
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continue;
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}
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slave_addr = camera_sensor[i].sccb_addr;
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slave_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
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i2c_master_stop(cmd);
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esp_err_t ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if( ret == ESP_OK) {
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return slave_addr;
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}
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}
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return 0;
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}
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uint8_t SCCB_Read(uint8_t slv_addr, uint8_t reg)
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{
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uint8_t data=0;
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esp_err_t ret = ESP_FAIL;
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) return -1;
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cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
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i2c_master_read_byte(cmd, &data, NACK_VAL);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) {
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ESP_LOGE(TAG, "SCCB_Read Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", slv_addr, reg, data, ret);
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}
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return data;
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}
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int SCCB_Write(uint8_t slv_addr, uint8_t reg, uint8_t data)
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{
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esp_err_t ret = ESP_FAIL;
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg, ACK_CHECK_EN);
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i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) {
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ESP_LOGE(TAG, "SCCB_Write Failed addr:0x%02x, reg:0x%02x, data:0x%02x, ret:%d", slv_addr, reg, data, ret);
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}
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return ret == ESP_OK ? 0 : -1;
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}
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uint8_t SCCB_Read16(uint8_t slv_addr, uint16_t reg)
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{
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uint8_t data=0;
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esp_err_t ret = ESP_FAIL;
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uint16_t reg_htons = LITTLETOBIG(reg);
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uint8_t *reg_u8 = (uint8_t *)®_htons;
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) return -1;
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cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
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i2c_master_read_byte(cmd, &data, NACK_VAL);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) {
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ESP_LOGE(TAG, "W [%04x]=%02x fail\n", reg, data);
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}
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return data;
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}
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int SCCB_Write16(uint8_t slv_addr, uint16_t reg, uint8_t data)
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{
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static uint16_t i = 0;
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esp_err_t ret = ESP_FAIL;
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uint16_t reg_htons = LITTLETOBIG(reg);
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uint8_t *reg_u8 = (uint8_t *)®_htons;
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
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i2c_master_write_byte(cmd, data, ACK_CHECK_EN);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) {
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ESP_LOGE(TAG, "W [%04x]=%02x %d fail\n", reg, data, i++);
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}
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return ret == ESP_OK ? 0 : -1;
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}
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uint16_t SCCB_Read_Addr16_Val16(uint8_t slv_addr, uint16_t reg)
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{
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uint16_t data = 0;
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uint8_t *data_u8 = (uint8_t *)&data;
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esp_err_t ret = ESP_FAIL;
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uint16_t reg_htons = LITTLETOBIG(reg);
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uint8_t *reg_u8 = (uint8_t *)®_htons;
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) return -1;
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cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | READ_BIT, ACK_CHECK_EN);
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i2c_master_read_byte(cmd, &data_u8[1], ACK_VAL);
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i2c_master_read_byte(cmd, &data_u8[0], NACK_VAL);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) {
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ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
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}
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return data;
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}
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int SCCB_Write_Addr16_Val16(uint8_t slv_addr, uint16_t reg, uint16_t data)
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{
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esp_err_t ret = ESP_FAIL;
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uint16_t reg_htons = LITTLETOBIG(reg);
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uint8_t *reg_u8 = (uint8_t *)®_htons;
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uint16_t data_htons = LITTLETOBIG(data);
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uint8_t *data_u8 = (uint8_t *)&data_htons;
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i2c_cmd_handle_t cmd = i2c_cmd_link_create();
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i2c_master_start(cmd);
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i2c_master_write_byte(cmd, ( slv_addr << 1 ) | WRITE_BIT, ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[0], ACK_CHECK_EN);
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i2c_master_write_byte(cmd, reg_u8[1], ACK_CHECK_EN);
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i2c_master_write_byte(cmd, data_u8[0], ACK_CHECK_EN);
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i2c_master_write_byte(cmd, data_u8[1], ACK_CHECK_EN);
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i2c_master_stop(cmd);
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ret = i2c_master_cmd_begin(sccb_i2c_port, cmd, 1000 / portTICK_RATE_MS);
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i2c_cmd_link_delete(cmd);
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if(ret != ESP_OK) {
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ESP_LOGE(TAG, "W [%04x]=%04x fail\n", reg, data);
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}
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return ret == ESP_OK ? 0 : -1;
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}
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