336 lines
12 KiB
C
336 lines
12 KiB
C
#ifndef SX1262_H
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#define SX1262_H
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#include "driver/spi_master.h"
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#include "driver/gpio.h"
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#include <stdint.h>
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#include <string.h>
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#include "esp_task.h"
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#define TAG "SX1262"
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#include "esp_log.h"
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#define LORA_SPI_HOST SPI2_HOST
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#define PIN_MOSI GPIO_NUM_10
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#define PIN_MISO GPIO_NUM_11
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#define PIN_SCK GPIO_NUM_9
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#define PIN_NSS GPIO_NUM_8
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#define PIN_RESET GPIO_NUM_12
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#define PIN_BUSY GPIO_NUM_13
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#define PIN_DIO1 GPIO_NUM_14
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extern spi_device_handle_t spi;
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typedef struct
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{
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uint8_t status;
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uint16_t error;
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} sx1262_status_t;
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typedef struct
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{
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uint16_t preambleLength;
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uint8_t headerType;
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uint8_t payloadLength;
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uint8_t crcType;
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uint8_t invertIQ;
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} sx1262_LoRaPacketParams_t;
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#define SX126X_DIOX_OUTPUT_ENABLE 0x0580
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#define SX126X_DIOX_INPUT_ENABLE 0x0583
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#define SX126X_DIOX_PULL_UP_CONTROL 0x0584
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#define SX126X_DIOX_PULL_DOWN_CONTROL 0x0585
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#define SX126X_WHITENING_INIT_MSB 0x06B8
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#define SX126X_WHITENING_INIT_LSB 0x06B9
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#define SX126X_CRC_INIT_MSB 0x06BC
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#define SX126X_CRC_INIT_LSB 0x06BD
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#define SX126X_CRC_POLY_MSB 0x06BE
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#define SX126X_CRC_POLY_LSB 0x06BF
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#define SX126X_SYNCWORD_0 0x06C0
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#define SX126X_SYNCWORD_1 0x06C1
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#define SX126X_SYNCWORD_2 0x06C2
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#define SX126X_SYNCWORD_3 0x06C3
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#define SX126X_SYNCWORD_4 0x06C4
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#define SX126X_SYNCWORD_5 0x06C5
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#define SX126X_SYNCWORD_6 0x06C6
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#define SX126X_SYNCWORD_7 0x06C7
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#define SX126X_NODE_ADDRESS 0x06CD
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#define SX126X_BROADCAST_ADDRESS 0x06CE
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#define SX126X_IQ_POLARITY_SETUP 0x0736
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#define SX126X_LORA_SYNCWORD_MSB 0x0740
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#define SX126X_LORA_SYNCWORD_LSB 0x0741
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#define SX126X_RANDOM_NUMBER_0 0x0819
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#define SX126X_RANDOM_NUMBER_1 0x081A
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#define SX126X_RANDOM_NUMBER_2 0x081B
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#define SX126X_RANDOM_NUMBER_3 0x081C
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#define SX126X_TX_MODULATION 0x0889
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#define SX126X_RX_GAIN 0x08AC
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#define SX126X_TX_CLAMP_CONFIG 0x08D8
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#define SX126X_OCP_CONFIGURATION 0x08E7
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#define SX126X_RTC_CONTROL 0x0902
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#define SX126X_XTA_TRIM 0x0911
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#define SX126X_XTB_TRIM 0x0912
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#define SX126X_DIO3_OUTPUT_VOLTAGE 0x0920
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#define SX126X_EVENT_MASK 0x0944
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// Default values where applicable
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#define SX126X_RX_GAIN_POWER_SAVING 0x94
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#define SX126X_RX_GAIN_BOOSTED 0x96
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#define SX126X_LORA_SYNCWORD_PUBLIC 0x3444
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#define SX126X_LORA_SYNCWORD_PRIVATE 0x1424
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#define SX126X_OCP_LEVEL_SX1262 0x38 // 140mA
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#define SX126X_OCP_LEVEL_SX1261 0x18 // 60mA
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typedef struct
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{
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uint8_t spreadingFactor; // LoRa SF: 0x05 (SF5) to 0x0C (SF12)
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uint8_t bandwidth; // LoRa BW: 0x00 (7.81 kHz) to 0x06 (500 kHz)
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uint8_t codingRate; // LoRa CR: 0x01 (4/5) to 0x04 (4/8)
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uint8_t lowDataRateOpt; // LDRO: 0x00 (disabled) or 0x01 (enabled)
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} sx1262_LoRaModulationParams_t;
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typedef struct
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{
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uint32_t bitRate; // GFSK bitrate (BR), calculated as 32 * Fxtal / BR
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uint8_t pulseShape; // GFSK filter: 0x00 (none) to 0x0B (Gaussian BT 1)
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uint8_t bandwidth; // GFSK RX bandwidth: 0x1F (4.8 kHz) to 0x09 (467 kHz)
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uint32_t frequencyDev; // GFSK frequency deviation (Fdev)
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} sx1262_GFSKModulationParams_t;
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#include <math.h>
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#define XTAL_FREQ (double)32000000
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#define FREQ_DIV (double)pow(2.0, 25.0)
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#define FREQ_STEP (double)(XTAL_FREQ / FREQ_DIV)
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#define SX1262_SLEEPCFG_ColdStart_RTCDisable 0
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#define SX1262_SLEEPCFG_ColdStart_RTCEnable 1
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#define SX1262_SLEEPCFG_WarmStart_RTCDisable 4
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#define SX1262_SLEEPCFG_WarmStart_RTCEnable 5
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#define SX1262_STANDBY_RC 0
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#define SX1262_STANDBY_XOSC 1
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#define SX1262_TIMEOUT_ONCE 0
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#define SX1262_TIMEOUT_RX_CONTINOUS 0xFFFFFF
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#define SX1262_RECEIVE_MODE 0
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#define SX1262_TRANSMIT_MODE 1
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#define SX1262_STOP_TIMER_ON_PREAMBLE_DISABLE 0x00
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#define SX1262_STOP_TIMER_ON_PREAMBLE_ENABLE 0x01
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#define SX1262_REGULATOR_LDO_ONLY 0x00
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#define SX1262_REGULATOR_DC_DC_LDO 0x01
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#define SX1262_FALLBACK_FS 0x40
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#define SX1262_FALLBACK_STANDBY_XOSC 0x30
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#define SX1262_FALLBACK_RC 0x20
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#define SX1262_IRQ_TXDone (1 << 0)
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#define SX1262_IRQ_RXDone (1 << 1)
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#define SX1262_IRQ_PreambleDetected (1 << 2)
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#define SX1262_IRQ_SyncWordValid (1 << 3)
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#define SX1262_IRQ_HeaderValid (1 << 4)
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#define SX1262_IRQ_HeaderError (1 << 5)
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#define SX1262_IRQ_CRCError (1 << 6)
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#define SX1262_IRQ_ChannelActivityDetectionDone (1 << 7)
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#define SX1262_IRQ_ChannelActivityDetected (1 << 8)
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#define SX1262_IRQ_Timeout (1 << 9)
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#define SX1262_IRQ_ALL (SX1262_IRQ_TXDone | SX1262_IRQ_RXDone | SX1262_IRQ_PreambleDetected | SX1262_IRQ_SyncWordValid | SX1262_IRQ_HeaderValid | SX1262_IRQ_HeaderError | SX1262_IRQ_CRCError | SX1262_IRQ_ChannelActivityDetectionDone | SX1262_IRQ_ChannelActivityDetected | SX1262_IRQ_Timeout)
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#define SX1262_TCXO_VOLTAGE16dV 0x00
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#define SX1262_TCXO_VOLTAGE17dV 0x01
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#define SX1262_TCXO_VOLTAGE18dV 0x02
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#define SX1262_TCXO_VOLTAGE22dV 0x03
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#define SX1262_TCXO_VOLTAGE24dV 0x04
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#define SX1262_TCXO_VOLTAGE27dV 0x05
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#define SX1262_TCXO_VOLTAGE30dV 0x06
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#define SX1262_TCXO_VOLTAGE33dV 0x07
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#define SX1262_PACKET_TYPE_GFSK 0x00
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#define SX1262_PACKET_TYPE_LORA 0x01
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#define SX1262_Ramp_10U (0x00)
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#define SX1262_Ramp_20U (0x01)
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#define SX1262_Ramp_40U (0x02)
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#define SX1262_Ramp_80U (0x03)
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#define SX1262_Ramp_200U (0x04)
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#define SX1262_Ramp_800U (0x05)
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#define SX1262_Ramp_1700U (0x06)
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#define SX1262_Ramp_3400U (0x07)
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#define SX1262_HEADER_TYPE_VARIABLE 0x00
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#define SX1262_HEADER_TYPE_FIXED 0x01
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#define SX1262_CRC_OFF 0x00
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#define SX1262_CRC_ON 0x01
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#define SX1262_STANDARD_IQ 0x00
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#define SX1262_INVERTED_IQ 0x01
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#define SX1262_CAD_ON_1_SYMB 0x00
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#define SX1262_CAD_ON_2_SYMB 0x01
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#define SX1262_CAD_ON_4_SYMB 0x02
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#define SX1262_CAD_ON_8_SYMB 0x03
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#define SX1262_CAD_ON_16_SYMB 0x04
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#define SX1262_CAD_ONLY 0x00
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#define SX1262_CAD_RX 0x01
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#define SX1262_ERROR_CALIBRATION_RC64K (1 << 0)
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#define SX1262_ERROR_CALIBRATION_RC13M (1 << 1)
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#define SX1262_ERROR_CALIBRATION_PLL (1 << 2)
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#define SX1262_ERROR_CALIBRATION_ADC (1 << 3)
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#define SX1262_ERROR_CALIBRATION_IMG (1 << 4)
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#define SX1262_ERROR_CALIBRATION_XOSC (1 << 5)
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#define SX1262_ERROR_PLL_LOCK (1 << 6)
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#define SX1262_ERROR_PA_RAMP (1 << 8)
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#define SX1262_CALIB_RC64K (1 << 0) // RC64k calibration enabled
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#define SX1262_CALIB_RC13M (1 << 1) // RC13M calibration enabled
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#define SX1262_CALIB_PLL (1 << 2) // PLL calibration enabled
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#define SX1262_CALIB_ADC_PULSE (1 << 3) // ADC pulse calibration enabled
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#define SX1262_CALIB_ADC_BULK_N (1 << 4) // ADC bulk N calibration enabled
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#define SX1262_CALIB_ADC_BULK_P (1 << 5) // ADC bulk P calibration enabled
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#define SX1262_CALIB_IMAGE (1 << 6) // Image calibration enabled
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#define SX1262_CALIB_RESERVED (1 << 7) // Reserved bit (RFU)
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// Combined mask for all calibration settings
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#define SX1262_CALIBRATION_ALL (SX1262_CALIB_RC64K | SX1262_CALIB_RC13M | \
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SX1262_CALIB_PLL | SX1262_CALIB_ADC_PULSE | \
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SX1262_CALIB_ADC_BULK_N | SX1262_CALIB_ADC_BULK_P | \
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SX1262_CALIB_IMAGE)
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// GFSK Pulse Shape
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#define SX1262_GFSK_NO_FILTER (0x00)
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#define SX1262_GFSK_BT_0_3 (0x08)
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#define SX1262_GFSK_BT_0_5 (0x09)
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#define SX1262_GFSK_BT_0_7 (0x0A)
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#define SX1262_GFSK_BT_1_0 (0x0B)
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// GFSK Bandwidth
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#define SX1262_GFSK_RX_BW_4800 (0x1F)
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#define SX1262_GFSK_RX_BW_5800 (0x17)
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#define SX1262_GFSK_RX_BW_7300 (0x0F)
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#define SX1262_GFSK_RX_BW_9700 (0x1E)
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#define SX1262_GFSK_RX_BW_11700 (0x16)
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#define SX1262_GFSK_RX_BW_14600 (0x0E)
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#define SX1262_GFSK_RX_BW_19500 (0x1D)
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#define SX1262_GFSK_RX_BW_23400 (0x15)
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#define SX1262_GFSK_RX_BW_29300 (0x0D)
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#define SX1262_GFSK_RX_BW_39000 (0x1C)
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#define SX1262_GFSK_RX_BW_46900 (0x14)
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#define SX1262_GFSK_RX_BW_58600 (0x0C)
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#define SX1262_GFSK_RX_BW_78200 (0x1B)
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#define SX1262_GFSK_RX_BW_93800 (0x13)
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#define SX1262_GFSK_RX_BW_117300 (0x0B)
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#define SX1262_GFSK_RX_BW_156200 (0x1A)
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#define SX1262_GFSK_RX_BW_187200 (0x12)
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#define SX1262_GFSK_RX_BW_234300 (0x0A)
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#define SX1262_GFSK_RX_BW_312000 (0x19)
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#define SX1262_GFSK_RX_BW_373600 (0x11)
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#define SX1262_GFSK_RX_BW_467000 (0x09)
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// LoRa Spreading Factor (SF)
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#define SX1262_LORA_SF5 (0x05)
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#define SX1262_LORA_SF6 (0x06)
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#define SX1262_LORA_SF7 (0x07)
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#define SX1262_LORA_SF8 (0x08)
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#define SX1262_LORA_SF9 (0x09)
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#define SX1262_LORA_SF10 (0x0A)
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#define SX1262_LORA_SF11 (0x0B)
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#define SX1262_LORA_SF12 (0x0C)
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// LoRa Bandwidth (BW)
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#define SX1262_LORA_BW_7 (0x00) // 7.81 kHz
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#define SX1262_LORA_BW_10 (0x08) // 10.42 kHz
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#define SX1262_LORA_BW_15 (0x01) // 15.63 kHz
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#define SX1262_LORA_BW_20 (0x09) // 20.83 kHz
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#define SX1262_LORA_BW_31 (0x02) // 31.25 kHz
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#define SX1262_LORA_BW_41 (0x0A) // 41.67 kHz
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#define SX1262_LORA_BW_62 (0x03) // 62.50 kHz
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#define SX1262_LORA_BW_125 (0x04) // 125 kHz
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#define SX1262_LORA_BW_250 (0x05) // 250 kHz
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#define SX1262_LORA_BW_500 (0x06) // 500 kHz
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// LoRa Coding Rate (CR)
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#define SX1262_LORA_CR_4_5 (0x01)
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#define SX1262_LORA_CR_4_6 (0x02)
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#define SX1262_LORA_CR_4_7 (0x03)
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#define SX1262_LORA_CR_4_8 (0x04)
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#define SX1262_LORA_SYNC_WORD_MSB (0x0740)
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#define SX1262_LORA_SYNC_WORD_LSB (0x0741)
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void sx1262_setPacketType(uint8_t packetType);
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void sx1262_init();
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void sx1262_reset();
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void sx1262_wait_for_busy();
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void sx1262_write_command(uint8_t cmd, uint8_t *data, uint8_t len);
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void sx1262_read_command(uint8_t cmd, uint8_t *tx_payload_buffer, uint8_t tx_payload_len, uint8_t *rx_buffer, uint8_t len);
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sx1262_status_t sx1262_get_status();
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void sx1262_setSleep(uint8_t sleepCFG);
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void sx1262_setStandby(uint8_t standbyConf);
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void sx1262_setFrequencySynthesis();
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void sx1262_setMode(uint8_t mode, uint32_t timeout);
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void sx1262_stopTimerOnPreamble(uint8_t enable);
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void sx1262_setRxDutyCycle(uint32_t rxPeriod, uint32_t sleepPeriod);
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void sx1262_setChannelActivityDetection(void);
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void sx1262_setTxContinuousWave(void);
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void sx1262_setTxInfinitePreamble(void);
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void sx1262_setRegulatorMode(uint8_t mode);
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void sx1262_calibrate(uint8_t calibParam);
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void sx1262_calibrateImage(uint8_t freq1, uint8_t freq2);
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void sx1262_setRxTXFallbackMode(uint8_t fallbackMode);
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void sx1262_writeRegister(uint16_t address, const uint8_t *data, size_t length);
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void sx1262_readRegister(uint16_t address, uint8_t *data, size_t length);
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void sx1262_writeBuffer(uint8_t offset, const uint8_t *data, size_t length);
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void sx1262_readBuffer(uint8_t offset, uint8_t *data, size_t length);
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void sx1262_setDioIrqParams(uint16_t irqMask, uint16_t dio1Mask, uint16_t dio2Mask, uint16_t dio3Mask);
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uint16_t sx1262_getIrqStatus(void);
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void sx1262_clearIrqStatus(uint16_t clearIrqParam);
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void sx1262_setDIO2AsRfSwitchCtrl(uint8_t enable);
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void sx1262_setDIO3AsTCXOCtrl(uint8_t tcxoVoltage, uint32_t delay);
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void sx1262_setFrequency(uint32_t frequency);
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uint8_t sx1262_getPacketType();
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void sx1262_configure_tx_power(uint8_t paDutyCycle, uint8_t hpMax, uint8_t paLut, int8_t power, uint8_t rampTime);
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void sx1262_setLoRaPacketParams(sx1262_LoRaPacketParams_t *params);
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void sx1262_setCadParams(uint8_t cadSymbolNum, uint8_t cadDetPeak, uint8_t cadDetMin, uint8_t cadExitMode, uint32_t cadTimeout);
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void sx1262_setBufferBaseAddress(uint8_t txBaseAddr, uint8_t rxBaseAddr);
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void sx1262_setLoRaSymbNumTimeout(uint8_t symbNum);
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void sx1262_getStatus(uint8_t *status);
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void sx1262_getRxBufferStatus(uint8_t *payloadLengthRx, uint8_t *rxStartBufferPointer);
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void sx1262_getPacketStatus(uint8_t *rssi, uint8_t *snr, uint8_t *signalRssi);
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uint8_t sx1262_getRssiInst(uint8_t *rssiInst);
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void sx1262_getStats(uint16_t *pktReceived, uint16_t *pktCrcError, uint16_t *pktHeaderErr);
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void sx1262_resetStats(void);
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uint16_t sx1262_getDeviceErrors();
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void sx1262_clearDeviceErrors(void);
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void sx1262_setLoRaModulationParams(const sx1262_LoRaModulationParams_t *params);
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void sx1262_setGFSKModulationParams(const sx1262_GFSKModulationParams_t *params);
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#endif
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