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Do some stuff

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This commit is contained in:
Bruno Rybársky
2025-02-18 14:44:08 +01:00
parent 4d3755e2ce
commit 8f46a76fd4
21 changed files with 649 additions and 150 deletions
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42
cpu/core.c
View File

@@ -7,9 +7,10 @@
#include "string.h"
// Initialize CPU
void init_cpu(CPU *cpu) {
void init_cpu(CPU *cpu, SDL_Renderer *renderer) {
memset(cpu, 0, sizeof(CPU));
cpu->mode = CPU_MODE_HALTED | CPU_MODE_SECOND;
cpu->renderer = renderer;
}
// Helper function for setting flags in the CPU (here we assume bit0 is the Zero flag,
@@ -41,15 +42,15 @@ void step(CPU *cpu) {
oldPC = cpu->pc;
newPC = oldPC;
uint8_t opcode = read_mem(cpu, cpu->pc++);
const uint32_t differenceAlignment = oldPC % CPU_INSTRUCTION_SIZE;
if (differenceAlignment) {
cpu->pc += differenceAlignment;
}
uint8_t opcode = read_mem(cpu, cpu->pc++);
switch (opcode) {
case NOP:
//Don't do anything
@@ -386,7 +387,7 @@ void step(CPU *cpu) {
}
temp |= (1 << bit);
write_reg(cpu, reg1, temp);
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -402,9 +403,10 @@ void step(CPU *cpu) {
if (bit > 7) {
bit = 7;
}
temp &= ~(1 << bit);
write_reg(cpu, reg1, temp);
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -425,7 +427,8 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
cpu->pc -= 2;
break;
}
@@ -439,7 +442,7 @@ void step(CPU *cpu) {
}
temp |= (1 << bit);
write_mem(cpu, addrTemp, temp);
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -454,7 +457,7 @@ void step(CPU *cpu) {
}
temp &= ~(1 << bit);
write_mem(cpu, addrTemp, temp);
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -470,7 +473,8 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
cpu->pc -= 2;
break;
}
@@ -482,7 +486,7 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -499,7 +503,8 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
cpu->pc -= 2;
break;
}
@@ -515,7 +520,8 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
cpu->pc -= 2;
break;
}
@@ -526,7 +532,7 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -537,7 +543,7 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -548,7 +554,7 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -559,7 +565,7 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}
@@ -570,7 +576,7 @@ void step(CPU *cpu) {
cpu->pc = newPC;
break;
}
cpu->pc += CPU_INSTRUCTION_SIZE;
//cpu->pc += CPU_INSTRUCTION_SIZE;
break;
}

6
cpu/core.h
View File

@@ -6,9 +6,10 @@
#define RISCB_CORE_H
#include <stdint.h>
#include <SDL_render.h>
#include "stdio.h"
#define MEM_SIZE 65535
#define MEM_SIZE 2097120
// Register count (register names R0 to R7)
#define REG_COUNT 64
#define STACK_SIZE 255
@@ -39,11 +40,12 @@ typedef struct {
uint32_t programEnd;
uint8_t mode;
uint32_t cycle;
SDL_Renderer *renderer;
} CPU;
void step(CPU *cpu);
void init_cpu(CPU *cpu);
void init_cpu(CPU *cpu, SDL_Renderer *renderer);
// Helper function for setting flags in the CPU (here we assume bit0 is the Zero flag,
// and bit1 is the Negative flag).

93
cpu/memory.c
View File

@@ -6,6 +6,12 @@
#define SFR_OFFSET (0xDF00)
#define GPU_OFFSET (0xEF00)
#define GPU_SIZE (160 * 160)
#define GPU_END (GPU_OFFSET + GPU_SIZE)
uint8_t write_mem(CPU *cpu, uint32_t addr, uint8_t value) {
if (addr >= MEM_SIZE) {
return 1;
@@ -15,47 +21,110 @@ uint8_t write_mem(CPU *cpu, uint32_t addr, uint8_t value) {
case SFR_OFFSET + 0x00:
pcm_buffer_push(&audioData.pcmVoice, value << 8 | cpu->memory[SFR_OFFSET + 0x01]);
break;
case SFR_OFFSET + 0x02:
audioData.synthVoices[0].volume = value;
break;
case SFR_OFFSET + 0x03:
audioData.synthVoices[0].waveform = value;
break;
case SFR_OFFSET + 0x04:
audioData.synthVoices[0].phase = value;
break;
case SFR_OFFSET + 0x05:
audioData.synthVoices[0].frequency = value << 8 | cpu->memory[SFR_OFFSET + 0x06];
break;
case SFR_OFFSET + 0x07:
audioData.synthVoices[1].volume = value;
break;
case SFR_OFFSET + 0x08:
audioData.synthVoices[1].waveform = value;
break;
case SFR_OFFSET + 0x09:
audioData.synthVoices[1].phase = value;
break;
case SFR_OFFSET + 0x0A:
audioData.synthVoices[1].frequency = value << 8 | cpu->memory[SFR_OFFSET + 0x0B];
break;
case SFR_OFFSET + 0x0C:
audioData.synthVoices[2].volume = value;
break;
case SFR_OFFSET + 0x0D:
audioData.synthVoices[2].waveform = value;
break;
case SFR_OFFSET + 0x0E:
audioData.synthVoices[2].phase = value;
break;
case SFR_OFFSET + 0x0F:
audioData.synthVoices[2].frequency = value << 8 | cpu->memory[SFR_OFFSET + 0x10];
break;
case SFR_OFFSET + 0x12:
displayA.value = value;
break;
case SFR_OFFSET + 0x13:
displayB.value = value;
break;
case SFR_OFFSET + 0x14:
displayC.value = value;
break;
case SFR_OFFSET + 0x15:
displayD.value = value;
break;
case SFR_OFFSET + 0x16:
displayE.value = value;
break;
case SFR_OFFSET + 0x17:
displayF.value = value;
break;
case SFR_OFFSET + 0x18:
displayG.value = value;
break;
case SFR_OFFSET + 0x19:
displayH.value = value;
break;
default:
break;
}
if (addr >= GPU_OFFSET && addr < GPU_END) {
const int index = addr - GPU_OFFSET;
int x = index % 160;
int y = index / 160;
// Proper color scaling from 3-bit and 2-bit channels
Uint8 r = ((value & 0xE0) >> 5) * 36; // 0–7 mapped to 0–255
Uint8 g = ((value & 0x1C) >> 2) * 36;
Uint8 b = ((value & 0x03)) * 85; // 0–3 mapped to 0–255
// Ensure texture format matches RGBA8888
Uint32 color = (255 << 24) | (r << 16) | (g << 8) | b;
Uint32 *pixels = (Uint32 *) gpuSurf->pixels;
pixels[(y * gpuSurf->w) + x] = color;
gpuSurfDirty = true;
}
cpu->memory[addr] = value;
return 0;
}
@@ -66,6 +135,30 @@ uint8_t read_mem(CPU *cpu, uint32_t addr) {
}
switch (addr) {
case SFR_OFFSET + 0x20:
return (switchesA.value >> 8) & 0xFF;
case SFR_OFFSET + 0x21:
return switchesA.value & 0xFF;
case SFR_OFFSET + 0x22:
return (switchesB.value >> 8) & 0xFF;
case SFR_OFFSET + 0x23:
return switchesB.value & 0xFF;
case SFR_OFFSET + 0x24:
return (switchesC.value >> 8) & 0xFF;
case SFR_OFFSET + 0x25:
return switchesC.value & 0xFF;
case SFR_OFFSET + 0x26:
return (switchesD.value >> 8) & 0xFF;
case SFR_OFFSET + 0x27:
return switchesD.value & 0xFF;
default:
return cpu->memory[addr];
}