Do some stuff
This commit is contained in:
3
docs/examples/disptest.bsm
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3
docs/examples/disptest.bsm
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MOV 0XFF R1
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MOV R1 [0XDF12]
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HLT
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@@ -1,53 +0,0 @@
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; Test Program using all opcodes
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START:
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NOP ; No operation (does nothing, advances to the next instruction)
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MOV R1, 0x10 ; Move immediate value 0x10 to register R1
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MOV R2, R1 ; Move value from R1 to R2
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MOV [0x2000], R3 ; Load value from memory address 0x2000 into R3
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MOV R1, [0x2000] ; Store R1 value to memory address 0x2000
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SWAP R1, R2 ; Swap values between R1 and R2
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SWAPN R1 ; Swap nibbles within R1
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ADD R1, R2 ; Add R2 to R1
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ADD R1, 0x10 ; Add immediate 0x10 to R1
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SUB R1, R2 ; Subtract R2 from R1
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SUB R1, 0x10 ; Subtract immediate 0x10 from R1
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MUL R1, R2 ; Multiply R1 by R2
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MUL R1, 0x10 ; Multiply R1 by immediate 0x10
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DIV R1, R2 ; Divide R1 by R2
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DIV R1, 0x10 ; Divide R1 by immediate 0x10
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MOD R1, R2 ; Compute remainder of R1 / R2
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MOD R1, 0x10 ; Compute remainder of R1 / 0x10
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NEG R1 ; Negate R1
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AND R1, R2 ; Bitwise AND of R1 and R2
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AND R1, 0x10 ; Bitwise AND R1 with immediate 0x10
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OR R1, R2 ; Bitwise OR of R1 and R2
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OR R1, 0x10 ; Bitwise OR R1 with immediate 0x10
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XOR R1, R2 ; Bitwise XOR of R1 and R2
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XOR R1, 0x10 ; Bitwise XOR R1 with immediate 0x10
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NOT R1 ; Bitwise NOT of R1
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SHL R1, 2 ; Logical shift left R1 by 2 bits
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SHR R1, 2 ; Logical shift right R1 by 2 bits
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SAR R1, 2 ; Arithmetic shift right R1 by 2 bits (sign extended)
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JMP 0x3000 ; Jump to address 0x3000
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JMP +5 ; Jump 5 bytes forward
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INC R1 ; Increment R1
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INC [0x2000] ; Increment value at memory address 0x2000
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DEC R1 ; Decrement R1
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DEC [0x2000] ; Decrement value at memory address 0x2000
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CMP R1, R2 ; Compare R1 and R2 (sets flags based on R1 - R2)
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JE 0x4000 ; Jump to 0x4000 if equal (zero flag set)
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JNE 0x4000 ; Jump to 0x4000 if not equal (zero flag not set)
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JG 0x4000 ; Jump to 0x4000 if greater
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JL 0x4000 ; Jump to 0x4000 if less
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JGE 0x4000 ; Jump to 0x4000 if greater or equal
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JLE 0x4000 ; Jump to 0x4000 if less or equal
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CALL 0x5000 ; Call subroutine at 0x5000
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RET ; Return from subroutine
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JMPBC R1, 3, 0x4000 ; Jump to address 0x4000 if bit 3 in register R1 is not set
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JMPBC 0x2000, 5, 0x5000 ; Jump to address 0x5000 if bit 5 in memory at address 0x2000 is not set
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JMPBS R2, 1, 0x6000 ; Jump to address 0x6000 if bit 1 in register R2 is set
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JMPBS 0x3000, 7, 0x7000 ; Jump to address 0x7000 if bit 7 in memory at address 0x3000 is set
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; Halt the program
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HLT
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3
docs/examples/gputst.bsm
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3
docs/examples/gputst.bsm
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MOV 255 R1
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MOV R1 [0XEF00]
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HLT
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3
docs/examples/inctest.bsm
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3
docs/examples/inctest.bsm
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LP:
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INC R0
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JMP LP
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18
docs/examples/peritest.bsm
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18
docs/examples/peritest.bsm
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LP:
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MOV [0XDF20] R0
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MOV [0XDF21] R1
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MOV [0XDF22] R2
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MOV [0XDF23] R3
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MOV [0XDF24] R4
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MOV [0XDF25] R5
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MOV [0XDF26] R6
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MOV [0XDF27] R7
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MOV R0 [0XDF02]
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MOV R1 [0XDF03]
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MOV R2 [0XDF04]
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MOV R3 [0XDF05]
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MOV R4 [0XDF06]
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MOV R5 [0XDF12]
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MOV R6 [0XDF13]
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MOV R7 [0XDF14]
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JMP LP
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10
docs/examples/snd.bsm
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10
docs/examples/snd.bsm
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MOV 255 R1
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MOV R1 [0XDF02]
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MOV 0 R1
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MOV R1 [0XDF03]
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MOV R1 [0XDF04]
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MOV 0X03 R1
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MOV R1 [0XDF06]
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MOV 0XE8 R1
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MOV R1 [0XDF05]
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HLT
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@@ -12,19 +12,19 @@
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### **MOV_IMM_RN**
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`MOV R1, 0x10` - Move immediate value `0x10` to register `R1`
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`MOV 0x10, R1` - Move immediate value `0x10` to register `R1`
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### **MOV_RN_RM**
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`MOV R2, R1` - Move value from `R1` to `R2`
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`MOV R1, R2` - Move value from `R1` to `R2`
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### **MOV_RN_ADDR**
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`MOV R3, [0x2000]` - Load value from memory address `0x2000` into `R3`
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`MOV [0x2000], R3` - Load value from memory address `0x2000` into `R3`
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### **MOV_ADDR_RN**
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`MOV [0x2000], R1` - Store `R1` value to memory address `0x2000`
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`MOV R1, [0x2000]` - Store `R1` value to memory address `0x2000`
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### **SWAP**
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@@ -198,53 +198,14 @@
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`BITS [0x2000], 3` - Set bit `3` in memory at address `0x2000`
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- Reads a memory address as an argument.
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- Reads a bit index from the next byte.
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- Ensures the bit index is between `0-7`.
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- Sets the specified bit in the memory address.
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- Increments the program counter.
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### **BITC_ADDR**
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`BITC [0x2000], 5` - Clear bit `5` in memory at address `0x2000`
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- Reads a memory address as an argument.
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- Reads a bit index from the next byte.
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- Ensures the bit index is between `0-7`.
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- Clears the specified bit in the memory address.
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- Increments the program counter.
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### **BITS_RN**
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`BITS R1, 2` - Set bit `2` in register `R1`
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- Reads a register number.
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- Reads a bit index from the next byte.
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- Ensures the register is valid (`0 - REG_COUNT - 1`).
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- Ensures the bit index is between `0-7`.
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- Sets the specified bit in the register.
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- Increments the program counter.
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### **BITC_RN**
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`BITC R2, 6` - Clear bit `6` in register `R2`
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- Reads a register number.
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- Reads a bit index from the next byte.
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- Ensures the register is valid (`0 - REG_COUNT - 1`).
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- Ensures the bit index is between `0-7`.
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- Clears the specified bit in the register.
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- Increments the program counter.
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### **BITS (Special Instruction)**
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- This mnemonic decides between `BITS_RN` and `BITS_ADDR` based on the operand.
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- If the operand is a register, `BITS_RN` is used.
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- If the operand is a memory address, `BITS_ADDR` is used.
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### **BITC (Special Instruction)**
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- This mnemonic decides between `BITC_RN` and `BITC_ADDR` based on the operand.
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- If the operand is a register, `BITC_RN` is used.
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- If the operand is a memory address, `BITC_ADDR` is used.
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`BITC R2, 6` - Clear bit `6` in register `R2`
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53
docs/memory.md
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53
docs/memory.md
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# Memory Map Documentation
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#### PCM Buffer
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| Function | Address |
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|----------------------------------|----------|
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| **PCM Voice Buffer (High Byte)** | `0xDF00` |
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| **PCM Voice Buffer (Low Byte)** | `0xDF01` |
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If you want to write to both, write low byte first
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#### Voice Generators
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| Voice | Volume | Waveform | Phase | Frequency (High Byte, write last) | Frequency (Low Byte) |
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|-------------|----------|----------|----------|-----------------------------------|----------------------|
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| **Voice 0** | `0xDF02` | `0xDF03` | `0xDF04` | `0xDF05` | `0xDF06` |
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| **Voice 1** | `0xDF07` | `0xDF08` | `0xDF09` | `0xDF0A` | `0xDF0B` |
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| **Voice 2** | `0xDF0C` | `0xDF0D` | `0xDF0E` | `0xDF0F` | `0xDF10` |
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#### Display Controls
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| Display | Address |
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|---------------|----------|
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| **Display A** | `0xDF12` |
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| **Display B** | `0xDF13` |
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| **Display C** | `0xDF14` |
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| **Display D** | `0xDF15` |
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| **Display E** | `0xDF16` |
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| **Display F** | `0xDF17` |
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| **Display G** | `0xDF18` |
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| **Display H** | `0xDF19` |
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#### Switch Inputs
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| Switch Bank | First 2 rows Address | Last 2 rows Address |
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|----------------|----------------------|---------------------|
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| **Switches A** | `0xDF20` | `0xDF21` |
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| **Switches B** | `0xDF22` | `0xDF23` |
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| **Switches C** | `0xDF24` | `0xDF25` |
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| **Switches D** | `0xDF26` | `0xDF27` |
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### GPU Memory
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- **Base Address:** `0xEF00`
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- **Size:** `160 × 160` pixels
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- **End Address:** `0xEF00 + (160 × 160) = GPU_END`
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- **Color Encoding:**
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- Red: Bits `[7:5]` scaled (0-7 → 0-255)
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- Green: Bits `[4:2]` scaled (0-7 → 0-255)
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- Blue: Bits `[1:0]` scaled (0-3 → 0-255)
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- Pixels are stored in a texture-compatible `RGBA8888` format.
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## Memory Operations
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