729 lines
27 KiB
C
729 lines
27 KiB
C
//
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// Created by bruno on 1.2.2025.
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//
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#include "assembler.h"
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Label labels[MAX_LABELS];
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int labelCount = 0;
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//
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// Helper functions for string manipulation
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//
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void trim(char *s) {
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// Remove leading whitespace
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while (isspace((unsigned char) *s)) s++;
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// Remove trailing whitespace
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char *end = s + strlen(s) - 1;
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while (end > s && isspace((unsigned char) *end)) {
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*end = '\0';
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end--;
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}
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}
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// Look up a label by name; returns -1 if not found.
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int lookupLabel(const char *name) {
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for (int i = 0; i < labelCount; i++) {
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if (strcmp(labels[i].name, name) == 0)
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return labels[i].address;
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}
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return -1;
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}
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// Add a label to the table
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int addLabel(const char *name, int address) {
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if (labelCount >= MAX_LABELS) {
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fprintf(stderr, "Too many labels!\n");
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return 1;
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}
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strncpy(labels[labelCount].name, name, sizeof(labels[labelCount].name));
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labels[labelCount].address = address;
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labelCount++;
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}
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//
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// Parse a register string (e.g., "R0", "R1", etc.) and return it's number.
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// Returns -1 on error.
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int parseRegister(const char *token) {
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if (token[0] == 'R' || token[0] == 'r') {
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int reg = atoi(token + 1);
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if (reg >= 0 && reg < REG_COUNT)
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return reg;
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}
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return -1;
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}
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// Parse an immediate value (supports decimal and 0x... hexadecimal)
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uint8_t parseImmediate(const char *token) {
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int16_t value = 0; // Temporary variable as signed int16_t
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// Check if the value starts with '0x' or '0X' for hexadecimal
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if (strlen(token) > 2 && token[0] == '0' && (token[1] == 'x' || token[1] == 'X')) {
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// Handle hexadecimal: Check for signed hex (e.g. -0x1F4, +0x1F4)
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if (token[2] == '+' || token[2] == '-') {
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sscanf(token, "%hx", &value); // Hexadecimal signed (same as unsigned in sscanf)
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if (token[2] == '-') value = -value; // Adjust sign if negative
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} else {
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// Hexadecimal unsigned value
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sscanf(token, "%hx", &value);
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}
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} else {
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// Check if the value has a signed prefix (+ or -) for decimal
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if (token[0] == '+' || token[0] == '-') {
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sscanf(token, "%hd", &value); // Signed decimal
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} else {
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// Unsigned decimal value
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unsigned int unsigned_value;
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sscanf(token, "%u", &unsigned_value);
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value = (int16_t) unsigned_value; // Cast unsigned to signed
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}
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}
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// Convert signed 16-bit value to unsigned 8-bit value
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// Ensure the value fits within the range of uint8_t (0 to 255)
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return (uint8_t) (value & 0xFF); // Mask with 0xFF to discard upper bits
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}
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void toUpperCase(char *string) {
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while (*string) {
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if (*string > 0x60 && *string < 0x7b) {
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(*string) -= 0x20;
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}
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string++;
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}
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}
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void toLowerCase(char *string) {
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while (*string) {
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if (*string >= 'A' && *string <= 'Z') {
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(*string) += 0x20;
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}
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string++;
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}
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}
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//
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// Map an instruction mnemonic (string) to its opcode value and expected operand types.
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// For simplicity, we will return the opcode value and then in our parser we’ll decide how many operands to expect.
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// (In a full assembler you might use a more sophisticated data structure.)
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//
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int getOpcode(char *mnemonic) {
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toUpperCase(mnemonic);
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if (strcmp(mnemonic, "NOP") == 0)
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return NOP;
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else if (strcmp(mnemonic, "BRK") == 0)
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return BRK;
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else if (strcmp(mnemonic, "HLT") == 0)
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return HLT;
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else if (strcmp(mnemonic, "MOV") == 0)
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return -2; // Special case: we must decide between MOV_RN_IMM, MOV_RN_RM, MOV_RN_ADDR, MOV_ADDR_RN
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else if (strcmp(mnemonic, "SWAP") == 0)
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return SWAP;
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else if (strcmp(mnemonic, "SWAPN") == 0)
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return SWAPN;
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else if (strcmp(mnemonic, "ADD") == 0)
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return -3; // Special: decide between ADD_RN_RM and ADD_RN_IMM
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else if (strcmp(mnemonic, "SUB") == 0)
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return -4; // Special: decide between SUB_RN_RM and SUB_RN_IMM
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else if (strcmp(mnemonic, "MUL") == 0)
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return -5; // Special: decide between MUL_RN_RM and MUL_RN_IMM
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else if (strcmp(mnemonic, "DIV") == 0)
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return -6; // Special: decide between DIV_RN_RM and DIV_RN_IMM
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else if (strcmp(mnemonic, "MOD") == 0)
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return -7; // Special: decide between MOD_RN_RM and MOD_RN_IMM
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else if (strcmp(mnemonic, "NEG") == 0)
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return NEG_RN;
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else if (strcmp(mnemonic, "AND") == 0)
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return -8; // Special: decide between AND_RN_RM and AND_RN_IMM
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else if (strcmp(mnemonic, "OR") == 0)
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return -9; // Special: decide between OR_RN_RM and OR_RN_IMM
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else if (strcmp(mnemonic, "XOR") == 0)
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return -10; // Special: decide between XOR_RN_RM and XOR_RN_IMM
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else if (strcmp(mnemonic, "NOT") == 0)
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return NOT_RN;
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else if (strcmp(mnemonic, "SHL") == 0)
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return SHL_RN_IMM;
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else if (strcmp(mnemonic, "SHR") == 0)
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return SHR_RN_IMM;
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else if (strcmp(mnemonic, "SAR") == 0)
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return SAR_RN_IMM;
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else if (strcmp(mnemonic, "JMP") == 0)
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return -11; //Special: if + or - present choose JMP_REL, otherwise JMP
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else if (strcmp(mnemonic, "INC") == 0)
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return -12; //Special: decide between INC_RN and INC_ADDR
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else if (strcmp(mnemonic, "DEC") == 0)
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return -13; //Special: decide between DEC_RN and DEC_ADDR
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else if (strcmp(mnemonic, "CMP") == 0)
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return CMP;
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else if (strcmp(mnemonic, "JE") == 0)
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return JE;
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else if (strcmp(mnemonic, "JNE") == 0)
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return JNE;
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else if (strcmp(mnemonic, "JMPBS") == 0)
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return -14; //Special: decide between JMP_BIT_SET_RN and JMP_BIT_SET_ADDR
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else if (strcmp(mnemonic, "JMPBC") == 0)
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return -15; //Special: decide between JMP_BIT_CLEAR_RN and JMP_BIT_CLEAR_ADDR
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else if (strcmp(mnemonic, "JG") == 0)
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return JG;
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else if (strcmp(mnemonic, "JL") == 0)
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return JL;
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else if (strcmp(mnemonic, "JGE") == 0)
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return JGE;
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else if (strcmp(mnemonic, "JLE") == 0)
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return JLE;
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else if (strcmp(mnemonic, "CALL") == 0)
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return CALL;
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else if (strcmp(mnemonic, "RET") == 0)
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return RET;
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else {
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return -1;
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}
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}
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//
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// In this simple assembler, some instructions share a mnemonic, and we must choose the correct opcode
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// based on the type of the operand (register vs. immediate vs. memory).
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// The following helper functions decide that, given two operands (as strings).
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//
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// For example, "MOV Rn, 42" should choose MOV_RN_IMM, while "MOV Rn, Rm" should choose MOV_RN_RM.
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// We assume that memory addresses are written in square brackets, e.g. "[123]".
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//
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int resolveMOV(const char *dest, const char *src) {
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// If dest starts with '[' then it is a memory destination.
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if (dest[0] == '[') return MOV_ADDR_RN; // actually, MOV [Addr], Rn expects Rn in second operand
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// Otherwise, dest is a register.
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// Now, check src:
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if (src[0] == 'R' || src[0] == 'r') {
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return MOV_RN_RM;
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} else if (src[0] == '[') {
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return MOV_RN_ADDR;
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} else {
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return MOV_RN_IMM;
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}
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}
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int resolveALU(int baseOpcode, const char *src) {
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// baseOpcode is one of our special negative values for ADD, SUB, etc.
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if (src[0] == 'R' || src[0] == 'r') {
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switch (baseOpcode) {
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case -3:
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return ADD_RN_RM;
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case -4:
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return SUB_RN_RM;
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case -5:
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return MUL_RN_RM;
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case -6:
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return DIV_RN_RM;
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case -7:
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return MOD_RN_RM;
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case -8:
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return AND_RN_RM;
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case -9:
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return OR_RN_RM;
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case -10:
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return XOR_RN_RM;
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case -12:
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return INC_RN;
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case -13:
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return DEC_RN;
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case -14:
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return JMP_BIT_SET_RN;
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case -15:
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return JMP_BIT_CLEAR_RN;
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default:
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return -1;
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}
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} else if (src[0] == '+' || src[0] == '-') {
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switch (baseOpcode) {
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case -11:
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return JMP_REL;
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default:
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return -1;
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}
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} else {
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switch (baseOpcode) {
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case -3:
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return ADD_RN_IMM;
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case -4:
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return SUB_RN_IMM;
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case -5:
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return MUL_RN_IMM;
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case -6:
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return DIV_RN_IMM;
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case -7:
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return MOD_RN_IMM;
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case -8:
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return AND_RN_IMM;
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case -9:
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return OR_RN_IMM;
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case -10:
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return XOR_RN_IMM;
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case -11:
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return JMP;
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case -12:
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return INC_ADDR;
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case -13:
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return DEC_ADDR;
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case -14:
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return JMP_BIT_SET_ADDR;
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case -15:
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return JMP_BIT_CLEAR_ADDR;
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default:
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return -1;
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}
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}
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}
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// Reads a single line from the source string.
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const char *readLine(const char *source, char *buffer, size_t maxLen) {
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size_t i = 0;
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while (*source && *source != '\n' && i < maxLen - 1) {
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buffer[i++] = *source++;
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}
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buffer[i] = '\0';
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return (*source == '\n') ? source + 1 : source;
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}
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//
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// The first pass scans the assembly source file to record all labels and their addresses.
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// The address is simply the offset into the output machine code buffer.
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// For this example, every instruction is assumed to have a fixed length (opcode plus operand bytes).
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//
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int firstPass(const char *source) {
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char line[MAX_LINE_LENGTH];
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int addr = 0;
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labelCount = 0;
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const char *ptr = source;
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while (*ptr) {
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ptr = readLine(ptr, line, sizeof(line));
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trim(line);
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// Skip blank lines or comments.
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if (line[0] == '\0' || line[0] == ';' || line[0] == '#')
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continue;
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// Process labels.
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char *colon = strchr(line, ':');
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if (colon != NULL) {
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*colon = '\0';
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trim(line);
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addLabel(line, addr);
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char *rest = colon + 1;
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trim(rest);
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if (strlen(rest) == 0)
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continue;
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strcpy(line, rest);
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}
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// Parse the mnemonic and operands.
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char mnemonic[32], operand1[64], operand2[64], operand3[64];
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operand1[0] = '\0';
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operand2[0] = '\0';
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int tokenCount = sscanf(line, "%31s %63[^, ] %63[^, ] %63s",
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mnemonic, operand1, operand2, operand3);
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// Use the mapper to get a base opcode.
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int baseOpcode = getOpcode(mnemonic);
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if (baseOpcode == -1) {
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printf("Unknown instruction: %s\n", mnemonic);
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continue;
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}
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int size = 0; // Instruction size in bytes.
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if (baseOpcode == -2) {
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// MOV instruction requires further resolution.
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int resolvedOpcode = resolveMOV(operand1, operand2);
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if (resolvedOpcode == MOV_RN_IMM || resolvedOpcode == MOV_RN_RM) {
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size = 3; // opcode (1) + reg (1) + immediate or register (1)
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} else if (resolvedOpcode == MOV_RN_ADDR || resolvedOpcode == MOV_ADDR_RN) {
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size = 6; // opcode (1) + one operand as register (1) and one 32-bit address (4) [+ padding if needed]
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} else {
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size = 3; // fallback
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}
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} else if (baseOpcode < 0) {
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// Ambiguous instructions that use resolveALU.
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// For JMP and jump-bit instructions, the jump target is in operand1.
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if (baseOpcode == -11) {
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// JMP: if operand1 starts with '+' or '-', it's relative.
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if (operand1[0] == '+' || operand1[0] == '-') {
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// resolve as JMP_REL.
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int resolvedOpcode = resolveALU(baseOpcode, operand1);
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size = 2; // opcode (1) + 1-byte relative offset (1)
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} else {
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int resolvedOpcode = resolveALU(baseOpcode, operand1);
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size = 5; // opcode (1) + 32-bit absolute address (4)
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}
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} else if (baseOpcode == -14 || baseOpcode == -15) {
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// JMPBS or JMPBC (jump if bit set/clear)
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int resolvedOpcode = resolveALU(baseOpcode, operand1);
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if (operand1[0] == 'R' || operand1[0] == 'r')
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size = 7; // opcode (1) + register (1) + bit (1) + 32-bit jump address (4)
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else
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size = 10; // opcode (1) + 32-bit memory address (4) + bit (1) + 32-bit jump address (4)
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} else {
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// For arithmetic ALU instructions and INC/DEC,
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// use operand2 to resolve.
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int resolvedOpcode = resolveALU(baseOpcode, operand2);
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switch (resolvedOpcode) {
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case ADD_RN_RM:
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case SUB_RN_RM:
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case MUL_RN_RM:
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case DIV_RN_RM:
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case MOD_RN_RM:
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case AND_RN_RM:
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case OR_RN_RM:
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case XOR_RN_RM:
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case ADD_RN_IMM:
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case SUB_RN_IMM:
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case MUL_RN_IMM:
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case DIV_RN_IMM:
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case MOD_RN_IMM:
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case AND_RN_IMM:
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case OR_RN_IMM:
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case XOR_RN_IMM:
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size = 3; // opcode (1) + register (1) + reg/immediate (1)
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break;
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case INC_RN:
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case DEC_RN:
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size = 2; // opcode (1) + register (1)
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break;
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case INC_ADDR:
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case DEC_ADDR:
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size = 5; // opcode (1) + 32-bit address (4)
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break;
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default:
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size = 3;
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break;
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}
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}
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} else {
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// Non-ambiguous instructions that have positive opcodes.
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// Use the mapping value (baseOpcode) directly.
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switch (baseOpcode) {
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case NOP:
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case BRK:
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case HLT:
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size = 1;
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break;
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case SWAP:
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case CMP:
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size = 3;
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break;
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case SWAPN:
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case NEG_RN:
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case NOT_RN:
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size = 2;
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break;
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case SHL_RN_IMM:
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case SHR_RN_IMM:
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case SAR_RN_IMM:
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size = 3;
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break;
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case JE:
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case JNE:
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case JG:
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case JL:
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case JGE:
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case JLE:
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case CALL:
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size = 5; // opcode (1) + 32-bit address (4)\n break;
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case RET:
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size = 1;
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break;
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default:
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size = 3;
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break;
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}
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}
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addr += size;
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}
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return addr;
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}
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//
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// The second pass actually translates the assembly instructions to machine code.
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// The machine code is written into the provided buffer. (It must be large enough.)
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//
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int secondPass(const char *source, uint8_t *code) {
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char line[MAX_LINE_LENGTH];
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int addr = 0;
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const char *ptr = source;
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while (*ptr) {
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ptr = readLine(ptr, line, sizeof(line));
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trim(line);
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if (line[0] == '\0' || line[0] == ';' || line[0] == '#')
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continue;
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// Remove any label definitions (up to the colon).
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char *colon = strchr(line, ':');
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if (colon != NULL) {
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*colon = ' '; // Replace the colon so the rest of the line can be parsed.
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continue;
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}
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if (strlen(line) == 0)
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continue;
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// Parse mnemonic and up to three operands.
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char mnemonic[32], operand1[64], operand2[64], operand3[64];
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mnemonic[0] = operand1[0] = operand2[0] = operand3[0] = '\0';
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int tokenCount = sscanf(line, "%31s %63[^, ] %63[^, ] %63s",
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mnemonic, operand1, operand2, operand3);
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// (Optionally, you might trim each operand individually here.)
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// Map the mnemonic to a base opcode.
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int baseOpcode = getOpcode(mnemonic);
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if (baseOpcode == -1) {
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fprintf(stderr, "Unknown instruction: %s\n", mnemonic);
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return 1;
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}
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// --- MOV Instruction (baseOpcode == -2) ---
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if (baseOpcode == -2) {
|
||
if (strlen(operand1) == 0 || strlen(operand2) == 0) {
|
||
fprintf(stderr, "Error: MOV requires two operands.\n");
|
||
return 1;
|
||
}
|
||
int resolvedOpcode = resolveMOV(operand1, operand2);
|
||
code[addr++] = resolvedOpcode;
|
||
if (resolvedOpcode == MOV_RN_IMM) {
|
||
int reg = parseRegister(operand1);
|
||
uint8_t imm = parseImmediate(operand2);
|
||
code[addr++] = reg;
|
||
code[addr++] = imm;
|
||
} else if (resolvedOpcode == MOV_RN_RM) {
|
||
int regDest = parseRegister(operand1);
|
||
int regSrc = parseRegister(operand2);
|
||
code[addr++] = regDest;
|
||
code[addr++] = regSrc;
|
||
} else if (resolvedOpcode == MOV_RN_ADDR) {
|
||
int reg = parseRegister(operand1);
|
||
// Assume source is written as "[address]": remove the brackets.
|
||
char addrStr[32];
|
||
strncpy(addrStr, operand2 + 1, strlen(operand2) - 2);
|
||
addrStr[strlen(operand2) - 2] = '\0';
|
||
uint32_t memAddr = (uint32_t) strtoul(addrStr, NULL, 0);
|
||
code[addr++] = reg;
|
||
code[addr++] = (memAddr >> 24) & 0xFF;
|
||
code[addr++] = (memAddr >> 16) & 0xFF;
|
||
code[addr++] = (memAddr >> 8) & 0xFF;
|
||
code[addr++] = memAddr & 0xFF;
|
||
} else if (resolvedOpcode == MOV_ADDR_RN) {
|
||
// Destination is memory (written as "[address]").
|
||
char addrStr[32];
|
||
strncpy(addrStr, operand1 + 1, strlen(operand1) - 2);
|
||
addrStr[strlen(operand1) - 2] = '\0';
|
||
uint32_t memAddr = (uint32_t) strtoul(addrStr, NULL, 0);
|
||
int reg = parseRegister(operand2);
|
||
code[addr++] = (memAddr >> 24) & 0xFF;
|
||
code[addr++] = (memAddr >> 16) & 0xFF;
|
||
code[addr++] = (memAddr >> 8) & 0xFF;
|
||
code[addr++] = memAddr & 0xFF;
|
||
code[addr++] = reg;
|
||
}
|
||
}
|
||
// --- INC and DEC (baseOpcode == -12 or -13) ---
|
||
// These instructions require only a single operand.
|
||
else if (baseOpcode == -12 || baseOpcode == -13) {
|
||
if (strlen(operand1) == 0) {
|
||
fprintf(stderr, "Error: %s requires one operand.\n", mnemonic);
|
||
return 1;
|
||
}
|
||
int resolvedOpcode = resolveALU(baseOpcode, operand1);
|
||
code[addr++] = resolvedOpcode;
|
||
if (operand1[0] == 'R' || operand1[0] == 'r') {
|
||
int reg = parseRegister(operand1);
|
||
code[addr++] = reg;
|
||
} else {
|
||
// Assume memory reference written as "[address]".
|
||
char addrStr[32];
|
||
strncpy(addrStr, operand1 + 1, strlen(operand1) - 2);
|
||
addrStr[strlen(operand1) - 2] = '\0';
|
||
uint32_t memAddr = (uint32_t) strtoul(addrStr, NULL, 0);
|
||
code[addr++] = (memAddr >> 24) & 0xFF;
|
||
code[addr++] = (memAddr >> 16) & 0xFF;
|
||
code[addr++] = (memAddr >> 8) & 0xFF;
|
||
code[addr++] = memAddr & 0xFF;
|
||
}
|
||
}
|
||
// --- Other Ambiguous ALU Instructions (ADD, SUB, MUL, etc.) ---
|
||
// These require two operands (destination and source).
|
||
else if (baseOpcode < 0 && baseOpcode != -2 && baseOpcode != -11 &&
|
||
baseOpcode != -14 && baseOpcode != -15 && baseOpcode != -12 && baseOpcode != -13) {
|
||
if (strlen(operand1) == 0 || strlen(operand2) == 0) {
|
||
fprintf(stderr, "Error: %s requires two operands.\n", mnemonic);
|
||
return 1;
|
||
}
|
||
int resolvedOpcode = resolveALU(baseOpcode, operand2);
|
||
code[addr++] = resolvedOpcode;
|
||
int regDest = parseRegister(operand1);
|
||
code[addr++] = regDest;
|
||
if (operand2[0] == 'R' || operand2[0] == 'r') {
|
||
int regSrc = parseRegister(operand2);
|
||
code[addr++] = regSrc;
|
||
} else {
|
||
uint8_t imm = parseImmediate(operand2);
|
||
code[addr++] = imm;
|
||
}
|
||
}
|
||
// --- JMP Instruction (baseOpcode == -11) ---
|
||
else if (baseOpcode == -11) {
|
||
if (strlen(operand1) == 0) {
|
||
fprintf(stderr, "Error: JMP requires one operand.\n");
|
||
return 1;
|
||
}
|
||
int resolvedOpcode = resolveALU(baseOpcode, operand1);
|
||
code[addr++] = resolvedOpcode;
|
||
if (operand1[0] == '+' || operand1[0] == '-') {
|
||
// Relative jump: one-byte offset.
|
||
uint8_t offset = parseImmediate(operand1);
|
||
code[addr++] = offset;
|
||
} else {
|
||
// Absolute jump: use label lookup for 32-bit address.
|
||
uint32_t jumpAddr = (uint32_t) lookupLabel(operand1);
|
||
code[addr++] = (jumpAddr >> 24) & 0xFF;
|
||
code[addr++] = (jumpAddr >> 16) & 0xFF;
|
||
code[addr++] = (jumpAddr >> 8) & 0xFF;
|
||
code[addr++] = jumpAddr & 0xFF;
|
||
}
|
||
}
|
||
// --- Jump Bit Set/Clear Instructions (JMPBS, JMPBC) ---
|
||
else if (baseOpcode == -14 || baseOpcode == -15) {
|
||
if (strlen(operand1) == 0 || strlen(operand2) == 0 || strlen(operand3) == 0) {
|
||
fprintf(stderr, "Error: %s requires three operands.\n", mnemonic);
|
||
return 1;
|
||
}
|
||
int resolvedOpcode = resolveALU(baseOpcode, operand1);
|
||
code[addr++] = resolvedOpcode;
|
||
// Encode the source operand (register or memory).
|
||
if (operand1[0] == 'R' || operand1[0] == 'r') {
|
||
int reg = parseRegister(operand1);
|
||
code[addr++] = reg;
|
||
} else {
|
||
char addrStr[32];
|
||
strncpy(addrStr, operand1 + 1, strlen(operand1) - 2);
|
||
addrStr[strlen(operand1) - 2] = '\0';
|
||
uint32_t memAddr = (uint32_t) strtoul(addrStr, NULL, 0);
|
||
code[addr++] = (memAddr >> 24) & 0xFF;
|
||
code[addr++] = (memAddr >> 16) & 0xFF;
|
||
code[addr++] = (memAddr >> 8) & 0xFF;
|
||
code[addr++] = memAddr & 0xFF;
|
||
}
|
||
// Encode the bit number (a one-byte immediate).
|
||
uint8_t bitVal = parseImmediate(operand2);
|
||
code[addr++] = bitVal;
|
||
// Encode the jump target (label -> 32-bit address).
|
||
uint32_t jumpAddr = (uint32_t) lookupLabel(operand3);
|
||
code[addr++] = (jumpAddr >> 24) & 0xFF;
|
||
code[addr++] = (jumpAddr >> 16) & 0xFF;
|
||
code[addr++] = (jumpAddr >> 8) & 0xFF;
|
||
code[addr++] = jumpAddr & 0xFF;
|
||
}
|
||
// --- Non-ambiguous Instructions ---
|
||
else if (baseOpcode > 0) {
|
||
switch (baseOpcode) {
|
||
case CMP:
|
||
case SWAP: {
|
||
if (strlen(operand1) == 0 || strlen(operand2) == 0) {
|
||
fprintf(stderr, "Error: %s requires two operands.\n", mnemonic);
|
||
return 1;
|
||
}
|
||
code[addr++] = baseOpcode;
|
||
int r1 = parseRegister(operand1);
|
||
int r2 = parseRegister(operand2);
|
||
code[addr++] = r1;
|
||
code[addr++] = r2;
|
||
break;
|
||
}
|
||
case SWAPN:
|
||
case NEG_RN:
|
||
case NOT_RN: {
|
||
if (strlen(operand1) == 0) {
|
||
fprintf(stderr, "Error: %s requires one operand.\n", mnemonic);
|
||
return 1;
|
||
}
|
||
code[addr++] = baseOpcode;
|
||
int reg = parseRegister(operand1);
|
||
code[addr++] = reg;
|
||
break;
|
||
}
|
||
case SHL_RN_IMM:
|
||
case SHR_RN_IMM:
|
||
case SAR_RN_IMM: {
|
||
if (strlen(operand1) == 0 || strlen(operand2) == 0) {
|
||
fprintf(stderr, "Error: %s requires two operands.\n", mnemonic);
|
||
return 1;
|
||
}
|
||
code[addr++] = baseOpcode;
|
||
int reg = parseRegister(operand1);
|
||
code[addr++] = reg;
|
||
uint8_t imm = parseImmediate(operand2);
|
||
code[addr++] = imm;
|
||
break;
|
||
}
|
||
case JE:
|
||
case JNE:
|
||
case JG:
|
||
case JL:
|
||
case JGE:
|
||
case JLE:
|
||
case CALL: {
|
||
if (strlen(operand1) == 0) {
|
||
fprintf(stderr, "Error: %s requires one operand.\n", mnemonic);
|
||
return 1;
|
||
}
|
||
code[addr++] = baseOpcode;
|
||
// If the operand isn’t purely numeric, treat it as a label.
|
||
if (!isdigit(operand1[0])) {
|
||
int labelAddr = lookupLabel(operand1);
|
||
if (labelAddr < 0) {
|
||
fprintf(stderr, "Error: undefined label '%s'\n", operand1);
|
||
return 1;
|
||
}
|
||
code[addr++] = (labelAddr >> 24) & 0xFF;
|
||
code[addr++] = (labelAddr >> 16) & 0xFF;
|
||
code[addr++] = (labelAddr >> 8) & 0xFF;
|
||
code[addr++] = labelAddr & 0xFF;
|
||
} else {
|
||
uint32_t immAddr = (uint32_t) strtoul(operand1, NULL, 0);
|
||
code[addr++] = (immAddr >> 24) & 0xFF;
|
||
code[addr++] = (immAddr >> 16) & 0xFF;
|
||
code[addr++] = (immAddr >> 8) & 0xFF;
|
||
code[addr++] = immAddr & 0xFF;
|
||
}
|
||
break;
|
||
}
|
||
case RET:
|
||
case BRK:
|
||
case HLT:
|
||
case NOP: {
|
||
code[addr++] = baseOpcode;
|
||
break;
|
||
}
|
||
default: {
|
||
fprintf(stderr, "Error: Unhandled opcode %d\n", baseOpcode);
|
||
return 1;
|
||
}
|
||
}
|
||
} else {
|
||
fprintf(stderr, "Error: Unknown instruction '%s'\n", mnemonic);
|
||
return 1;
|
||
}
|
||
}
|
||
|
||
return addr;
|
||
}
|
||
|
||
|
||
void completePass(const char *input, CPU *cpu, bool erase) {
|
||
// First pass: determine label addresses.
|
||
if (erase) {
|
||
init_cpu(cpu);
|
||
}
|
||
firstPass(input);
|
||
secondPass(input, cpu->memory);
|
||
} |